Intel Granite Rapids CPU breaks cover with 120 P-cores in new benchmark — Xeon 6900P wields 120 cores, 240 threads, and 744MB cache
We're starting to see benchmarks for Intel's Xeon 6 processors, which are slated to arrive this year.
Intel's upcoming Granite Rapids chip has been spotted on Geekbench and shared on X (formerly Twitter) by user BenchLeaks. The Xeon 6900P chip, which boasts 120 P-Cores and 240 threads, received a 1,021 single-core score and a 7,155 multi-core score in a dual-CPU configuration while running Geekbench 6.2.1. for Linux AVX2.
The Xeon 6900P was running on the Intel AvenueCity RVP (Reference Evaluation Platform), which has two LGA7529 sockets. Each processor has 120 P-cores, equivalent to 240 threads. The Xeon 6900P also wields 744MB of cache, distributed in a 240MB L2 cache and 504MB L3 cache. It's a significant upgrade over Intel's previous Emerald Rapids processors. In a dual-socket configuration, we're looking at 240 cores, 480 threads, and close to 1.5GB cache. The test platform was also utilizing 2TB of memory. Granite Rapids supports DDR5-6400 and DDR5-8800 (MCR) memory modules.
The benchmark results were somewhat disappointing, but there was a reason for that. The Xeon 6900P was an engineering sample so that the final specifications could vary. However, the Geekbench 6 logs revealed that the 120-core chip was running at the base clock speed of 1.8 GHz. The actual performance is unknown since the Xeon 6900P didn't hit the boost clock speeds.
The Granite Rapids chip is the more performance-oriented processor in the Intel Xeon 6 lineup. On the other hand, Intel has already launched the E-Core-only Sierra Forest chip. This version of the Intel Xeon 6 is optimized for high-density computing and comes with 144 cores, although 288-core chip versions are expected to arrive next year.
The Granite Rapids chip's massive number of 128 P-cores makes it one of Intel's most powerful chips. However, this also means it has an enormous power draw, with leaks pointing to a 500-watt TDP. In a dual-socket setup, we could look at a power consumption of up to 1,000W. It won't be an issue since data centers procuring these chips also look for novel cooling solutions to accommodate the TDP power and cooling requirements.
Granite Rapids should hit the market before the end of this year. The Intel Xeon 6 chips will compete against AMD's EPYC (Turin) lineups, which consist of two branches. Granite Rapids, which goes up to 128 cores, will battle it out with the Zen 5 SKUs up to 128 cores. Meanwhile, Sierra Forest, with up to 288 cores, will contend with the Zen 5c parts that scale up to 192 cores.
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Jowi Morales is a tech enthusiast with years of experience working in the industry. He’s been writing with several tech publications since 2021, where he’s been interested in tech hardware and consumer electronics.
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A Stoner 120 seems like an odd number of cores, I guess that is to allow 4 failed cores per package.Reply -
BillyBuerger The Xeon 6900P also wields 744MB of cache, distributed in a 240MB L2 cache and 504MB L3 cache. It's a significant upgrade over Intel's previous Emerald Rapids processors. In a dual-socket configuration, we're looking at 240 cores, 480 threads, and close to 1.5TB cache.
I'm guessing the 1.5TB cache is a typo and should be 1.5GB. -
bit_user
Golden Cove has better IPC than Zen 4. I'm not sure how they compare on instructions per Watt, however.nocturn9x said:So Intel's next gen server CPU has less cores than AMD's current offering and is probably going to cost significantly more.
Anyway, Zen 5 appears to match or surpass Golden Cove (and presumably Redwood Cove) in IPC, which will make it a very interesting matchup between Granite Rapids and Turin (Zen 5).
Granite Rapids also has AMX and some accelerators that EPYC doesn't. Finally, a version of Granite Rapids could also appear with on-package HBM.
Now, I'm not saying AMD won't continue to capture more of Intel's datacenter market share, in this new generation. However, I think these are unquestionably the most competitive server CPUs Intel has had against AMD, since Rome (Zen 2; circa 2019) and its 64 cores bested Cascade Lake and its 28 cores. -
nocturn9x
I agree with your analysis. Previous offerings from Intel were laughably bad. These at least seem to be able to (somewhat) compete, although I would wait for power draw information first. Intel has been throwing punches with AMD's consumer line but draws MUCH more power, so I wouldn't be surprised to see 60, 70 or even 100% more power being drawn compared to Zen 5 for speedups that just aren't worth the electricity and cooling cost for a datacenterbit_user said:Golden Cove has better IPC than Zen 4. I'm not sure how they compare on instructions per Watt, however.
Anyway, Zen 5 appears to match or surpass Golden Cove (and presumably Redwood Cove) in IPC, which will make it a very interesting matchup between Granite Rapids and Turin (Zen 5).
Granite Rapids also has AMX and some accelerators that EPYC doesn't. Finally, a version of Granite Rapids could also appear with on-package HBM.
Now, I'm not saying AMD won't continue to capture more of Intel's datacenter market share, in this new generation. However, I think these are unquestionably the most competitive server CPUs Intel has had against AMD, since Rome (Zen 2; circa 2019) and its 64 cores bested Cascade Lake and its 28 cores. -
NinoPino
What process node will be used for these CPUs ?nocturn9x said:I agree with your analysis. Previous offerings from Intel were laughably bad. These at least seem to be able to (somewhat) compete, although I would wait for power draw information first. Intel has been throwing punches with AMD's consumer line but draws MUCH more power, so I wouldn't be surprised to see 60, 70 or even 100% more power being drawn compared to Zen 5 for speedups that just aren't worth the electricity and cooling cost for a datacenter -
atmapuri
With previous iteration of Server CPUs Intel only enabled those accelerators, if additional licenses were purchased. They were not enabled as is. Intel will only be able to compete with AMD on equal terms. Namely, if they actually also deliver GraniteRapids CPUs with all the bells and whistles (accelerators) enabled.bit_user said:Granite Rapids also has AMX and some accelerators that EPYC doesn't -
bit_user
Well, this article quotes 500W, which aligns pretty well with what's been leaked about AMD's Turin:nocturn9x said:These at least seem to be able to (somewhat) compete, although I would wait for power draw information first. Intel has been throwing punches with AMD's consumer line but draws MUCH more power, so I wouldn't be surprised to see 60, 70 or even 100% more power being drawn compared to Zen 5 for speedups that just aren't worth the electricity and cooling cost for a datacenter
https://www.tomshardware.com/pc-components/cpus/leak-suggests-amds-upcoming-turin-zen-5-cpus-will-be-able-to-run-ram-at-6000-mtsSo, perhaps it will be quite a competitive match up?
One difference seems to be that Intel will support MCR DRAM, while AMD won't. However, I think AMD is said to be supporting up to 16 channels, while Intel stays at just 12? -
nocturn9x
Don't quote me on that, but I *think* they might be using TSMC's 3nm process. Not that it matters anyway, gate width has not been a useful metric for performance of silicon products for a long, long time.NinoPino said:What process node will be used for these CPUs ? -
nocturn9x
If the match up were competitive, that'd be great. I certainly wish so, it would just be better for customers at the end of the day. Not holding my breath, though.bit_user said:Well, this article quotes 500W, which aligns pretty well with what's been leaked about AMD's Turin:
https://www.tomshardware.com/pc-components/cpus/leak-suggests-amds-upcoming-turin-zen-5-cpus-will-be-able-to-run-ram-at-6000-mtsSo, perhaps it will be quite a competitive match up?
One difference seems to be that Intel will support MCR DRAM, while AMD won't. However, I think AMD is said to be supporting up to 16 channels, while Intel stays at just 12? -
NinoPino
Thanks.nocturn9x said:Don't quote me on that, but I *think* they might be using TSMC's 3nm process. Not that it matters anyway, gate width has not been a useful metric for performance of silicon products for a long, long time.