MSI PBO Enhanced Mode extracts extra performance out of Ryzen 9000 CPUs — Ryzen 9 9950X runs up to 10% faster and Ryzen 7 9700X up to 15%

Oh, and, if I am going to upgrade, it will only be if they have improved the packaging of the extra cache such that the chips can be overclocked better. That is what I am hoping the new generation will provide.

A Stoner said:

It works fine for everything, but I figure I burned almost $10k on the machine (I got into a in for a penny in for a pound mode for some stupid reason), if I can get more performance, less energy use, and lower temperatures for only ~$700 more, it would be worth it. Then I would recycle the 7950X3D into one of my older computer frames with some lower end components and then I would have a workstation to run some secondary tasks on. I have been wanting to learn how to render, but never felt comfortable tying my main computer with it and my older computers are much less capable.

Similar stories here: there is usually some machine in the family that could do with an upgrade and it results in a domino upgrade cascade and an opportunity for daddy to try something new which might not make sense in a straight swap.

For me it was upgrading my biggest workstation from a 5950X to a 7950X3D, while the former became the secondary, whose 5800X3D went to a kid's gamer rig, replacing an i7-7700k etc.

But using CPU power for rendering doesn't really make any sense any more, because e.g. Blender will work much faster with an RTX GPU than any CPU you can throw at it. It was nearly identical between a Xeon E5-2696 v3 and an RTX 2080ti some years ago, but these days even an RTX 4070 will outpace the 7950X3D, while the RTX 4090 it hosts makes it look like a lame old dog.

Apart from large compile jobs and running lots of nested VMs for my lab experiments there are really not that many use cases for a big CPU like the 7950X3D. In the mean-time, I'm just glad I got a rather good productivity chip that is more than half decent even at the occasional gaming when the latter doesn't pay the rent.

The flexibility is worth the relatively modest estra money, compared to the total amount of money in those boxes, where RAM, NVMe storage and GPUs figure much bigger.

With the 5950X using DDR4-3200 (ECC) and the RTX 4090 the occasional game didn't manage to hit the sweet spot between 60 and the 144 Hz my 4k 42" monitor supports, and that's where the 7950X3D manges to do quite a bit better with DDR5-6000 (ECC). For the home-lab use I need reliability so it's ECC on the RAM and no overclocking beyond PBO on the CPU, which unfortunately meant going from 128GB in four DIMMs on the 5950X to 96GB in just two DIMMs on the 7950X3D.

Again, not really an issue, but I'd have paid extra for the flexibility of using 128 or even 192GB: some experiments just take a lot of RAM, even if most of the time it's unused but ready to jump in.

I actually don't think a 9950X3D will deliver a noticeable improvement on any use case I am currently running, because with my reflexes there is no benefit in running games at 200 FPS or better, nor am I running circuit design or HPC workloads. Nor do I think I'll be able to do meaningful things with a 128 core CPU, while 10, 40 or even 100GHz might still hold attraction, if it could be done.

So for the foreseeable future, I might have reached the summit of what I'll need before my ultimate retirement, unless some gene engineering moves that horizon significantly.

But another downstream event might trigger the next cascade and that might have me replace the 7950X3D with a 9000 or Zen 6 anyway.

Admin said:

MSI has unveiled a new homebrewed version of PBO called PBO Enhanced Mode. As the name suggests, MSI's custom PBO profiles boost performance beyond what AMD's official PBO 2 can.

MSI PBO Enhanced Mode extracts extra performance out of Ryzen 9000 CPUs — Ryzen 9 9950X runs up to 10% faster and Ryzen 7 9700X up to 15% : Read more

Some people enjoy and pay for bragging rights, so if MSI will cover potential warranty fallouts, why not?

But somehow it doesn't seem very likely that MSI knows better how to operate 9000 series CPUs than AMD with the reliablity and predictability that a broad user base might expect.

It somehow reminds me of my experiments with the curve optimizer, where after a couple of hours everything seemed very smooth with games and benchmarks on Windows.

And then I booted the Linux that pays the rent and it crashed immediately, until I disabled the curve optimizer...

It wasn't even worth investigating further, because I didn't actually need whatever the curve optimizer was trying to achieve, while a stable reliable system was the bedrock for all the experimentation that I was doing on top to make a living.

A Stoner said:

Oh, and, if I am going to upgrade, it will only be if they have improved the packaging of the extra cache such that the chips can be overclocked better. That is what I am hoping the new generation will provide.

I think the only way I'd upgrade this gen is if 9950x3d has cache on both CCDs, maintains high clock speeds, and fixes the bafflingly awful core parking logic (or gives me some control over it). Otherwise, here's hoping Arrow Lake pulls a rabbit out of a hat.

jp7189 said:

I think the only way I'd upgrade this gen is if 9950x3d has cache on both CCDs, maintains high clock speeds, and fixes the bafflingly awful core parking logic (or gives me some control over it). Otherwise, here's hoping Arrow Lake pulls a rabbit out of a hat.

Seems you're into magic... disappointment may not be far then.

With regards to the clock impact of the v-cache, I'm mostly looking for a smart solution to enable greater choice, like the choice between having a V-cache on the CCD or not having it.

In the past that choice was static, on EPYCs all CCDs in a SoC would have V-Cache or none, on 79xxX3D you only got half and half. But in a better world you'd be able to flip CCDs between having V-Cache or not.

So what if you can flip CCDs between using V-Cache instead of having it? How much of a difference would that make?

How much of the clock limitations would go away if you could selectively purge and disable the V-cache on a CCD at run-time?

When this AMD fella was hinting at more choices, this is what popped up in my head.

I believe AMD never fully disclosed all the reasons why the V-cache limited boost, but to my understanding it can't really be the additional layers of silicon V-cache added: the dies are mounted silicon-on-silicon without a thermal gap and the conductivity of silicon is quite good, otherwise chips couldn't be cooled, right?

So part of it was evidently voltage and that might be less of an issue with the newer generation and then of course an additional layer of active silicon will generate heat in its self... unless it's shut off and becomes just another piece of dark silicon.

And even if voltage was an issue, if CMOS doesn't switch, there isn't much voltage involved.

So if they manage to pull off selectable V-cache you may get your dream, but of course that would take quite a bit of OS support to pull off even if technically it could be made to work and I have no idea if it would.

As a stand-alone feature for desktop chips even technical feasability probably wouldn't motivate AMD enough to try, because that's essentially a windfall from EPYC. Whether such a selective feature would sell on EPYC I simply wouldn't know. My general impression is that hyperscalers these days buy hardware with a fixed workload in mind and with complete disregard for any flexibility as that only adds cost.

But at a low-enough price or with the competition at their heels, AMD could pull your rabbit.

abufrejoval said:

Seems you're into magic... disappointment may not be far then.

With regards to the clock impact of the v-cache, I'm mostly looking for a smart solution to enable greater choice, like the choice between having a V-cache on the CCD or not having it.

In the past that choice was static, on EPYCs all CCDs in a SoC would have V-Cache or none, on 79xxX3D you only got half and half. But in a better world you'd be able to flip CCDs between having V-Cache or not.

So what if you can flip CCDs between using V-Cache instead of having it? How much of a difference would that make?

How much of the clock limitations would go away if you could selectively purge and disable the V-cache on a CCD at run-time?

When this AMD fella was hinting at more choices, this is what popped up in my head.

I believe AMD never fully disclosed all the reasons why the V-cache limited boost, but to my understanding it can't really be the additional layers of silicon V-cache added: the dies are mounted silicon-on-silicon without a thermal gap and the conductivity of silicon is quite good, otherwise chips couldn't be cooled, right?

So part of it was evidently voltage and that might be less of an issue with the newer generation and then of course an additional layer of active silicon will generate heat in its self... unless it's shut off and becomes just another piece of dark silicon.

And even if voltage was an issue, if CMOS doesn't switch, there isn't much voltage involved.

So if they manage to pull off selectable V-cache you may get your dream, but of course that would take quite a bit of OS support to pull off even if technically it could be made to work and I have no idea if it would.

As a stand-alone feature for desktop chips even technical feasability probably wouldn't motivate AMD enough to try, because that's essentially a windfall from EPYC. Whether such a selective feature would sell on EPYC I simply wouldn't know. My general impression is that hyperscalers these days buy hardware with a fixed workload in mind and with complete disregard for any flexibility as that only adds cost.

But at a low-enough price or with the competition at their heels, AMD could pull your rabbit.

To my understanding voltage limits and cooling are the main blockers to high frequency on v-cache CCDs. Both of those factors appear to be much better on Zen 5 (or more specifically TSMC 4) which is why I'm hoping for better clocks on this gen of x3d parts.

If clocks are the same with and without v-cache, then there's no need to trade off gaming vs productivity, and the only reason to limit v-cache to a single CCD is cost. Canabilizing a 12 channel epyc platform with a 2 channel ryzen isn't a concern. They aren't anywhere in the same league - v-cache or no.

As for my use case, I run a handful of VMs for work, and when I'm waiting on status bars on them, I may launch a game. I want all the game's thread on the same CCD, but I don't want to get there by parking the other CCD which still have work to do. I can't say I've noticed any problems on a 7950x, but it seems like core parking on the 9950x (why did they enable that on this chip anyway) might get in my way a bit. I expect 9950x3d to be the same, so I'd stay on the 7950x unless all the unicorns come out of the forest - 2x cache slices, high clocks, better core parking.

And the of course there's always Arrow Lake.