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Our Tests Show Not All Ryzen 3000 Cores Are Created Equal

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Disabling the 3600X's Fastest Cores

Disabling the Fastest Core

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To see the maximum speed possible with the fastest core removed, we disabled Core 4.

Ryzen Master marks Core 4 (in CCX 1) as the fastest single core in the chip, and Core 2 as the fastest core in the adjacent CCX 0 (but second-fastest overall). However, Ryzen Master only allows cores to be disabled in groups of two, one in each CCX, so we also removed Core 3, which is the slowest core in CCX 0.

This means we are now testing a 6-core 12-thread chip as a quad-core eight-thread processor. It's important to note that disabling these cores removes their L1 and L2 caches from the equation, but the same 16MB of shared L3 cache is still available, meaning that shouldn't adversely impact performance of the individual cores.

The utilization chart shows that Core 2 is now being targeted with the workloads. This makes sense, as it is marked as the second-fastest core in the chip. However, as you can see, Core 2 can only sustain a frequency of 4.25 GHz, which is 100 MHz below the sustained 4.35 GHz we measured with Core 4 in our prior tests. We do see three single measurements of 4.35 GHz, but these aren't nearly as impressive as the sustained boost periods we recorded with Core 4.

Also, notice that the workload now spans the entire length of the chart – and then some. This iteration of the test took 30 minutes (94 data points spill off the chart), while the testing with the fastest core enabled (prior page) only took 28 minutes and 25 seconds.

That ~100 MHz difference in average speed during the test seems slight, but it does equate to lower performance.

Disabling Both Fastest Cores

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This time around, we disabled both fastest cores (Core 2 and Core 4), so we're testing it in a quad-core configuration again. The workload now moves to Core 1, which is designated as the second-fastest core in CCX 0. This core oddly sustains a 4.3 GHz boost frequency, which is higher than what we recorded with the fastest core in the same CCX (Core 2). This could be the chip adjusting for power density due to less active cores nearby, but we aren't sure of how the cores are mapped on the physical die, so this is just a theory.

In either case, the targeted core still doesn't reach the same peak speed we recorded with the fastest core, lagging by 50 MHz.

With the incrementally faster performance comes a shorter run time, as you can see from the length of the test.

Disabling All Fast Cores

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Here we disabled all four cores marked as faster cores, in effect turning the processor into a dual-core. "Core 1" is targeted with the workload, but this isn't the same Core 1 we tested earlier. Because we disabled Core 1 and Core 2 for this test, this is actually physical Core 3. This core sustains an average speed of 4.3 GHz, but we spot periodic bursts of 4.325 GHz at the tail end of the run during the Cinebench sequence.


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86 Comments Comment from the forums
  • rhysiam 30 July 2019 01:14
    Really interesting article Paul and team, thanks!

    IMHO this is a case of clever engineering mixed that's been muddied by dubious (at best!) marketing. Intel's approach of specifying both Turbo Boost 2 (which all cores can meet) and Turbo Boost 3 (the highest possible clock speed on any single core) is a more transparent approach and one that AMD should adopt.

    As you suggest, AMD likely have binning requirements on the "worst" cores, but these should be included in the spec table for the CPU. We should know what they are. On Z390 motherboards you can flick an "MCE" switch and it just works (provided you can cool it), because Intel have a minimum frequency that each individual core must be able to hit. That's the way it should be.

    Intel have work to do around transparency too: their stupidly low base clocks and lack of transparency around dual + quad core boost frequencies is similarly misleading at best. But on the issue of this article, AMD should be more open. AMD's response quoted in this article is totally inadequate. Hopefully you gain some traction and they decide to give you more than "blah blah blah meet the product definition".
    Reply
  • AlistairAB 30 July 2019 01:59
    Wow this is fantastic work. I'm back to loving Tom's again. Remember Paul Alcorn ;)
    Reply
  • TJ Hooker 30 July 2019 02:20
    Something to keep in mind is that some Intel CPUs may fail to hit their max turbo speeds as well, albeit for different reasons. Intel is more specific about what the max turbo is for a given number of cores loaded, and some CPUs will only hit their max speed on a single core. The prevailing theory seems to be that with a typical system there will always be stuff going on in the background, such that there's never truly only one core being loaded, and therefore you may never actually see the single core turbo speed.

    I know my 6700k won't hit 4.2 GHz at stock settings running benchmarks like P95 or Cinebench single threaded.
    Reply
  • AlexTSG 30 July 2019 02:45
    Interesting reading this just a few days after the Silicon Lottery binning results.

    Given that AMD wants to use as much of the silicon they produce as possible, I wonder if we'll see 6 and 8 core processors that utilize two processor chiplets, where only 3 or 4 of the cores are active.

    I'm planning on building a new Ryzen 3000 system towards the end of the year, so I'm hoping that another 6 months sees some improvements made to the 7nm process, and possibly new processor steppings.
    Reply
  • rhysiam 30 July 2019 03:16
    TJ Hooker said:
    Something to keep in mind is that some Intel CPUs fail to hit their max turbo speeds as well, albeit for different reasons. Intel is more specific about what the max turbo is for a given number of cores loaded, and some CPUs will only hit their max speed on a single core. The prevailing theory seems to be that with a typical system there will always be stuff going on in the background, such that there's never truly only one core being loaded, and therefore you may never actually see the single core turbo speed.

    I know my 6700k won't hit 4.2 GHz at stock settings running benchmarks like P95 or Cinebench single threaded.
    That's interesting, I wasn't aware there were regular issues on Intel's side too.

    To be fair though, presumably you can just flick the MCE switch (or equivalent) in your BIOS and, assuming you have a capable motherboard and cooler, you should hit 4.2Ghz on all cores? In other words, all four cores should be capable of sustaining 4.2Ghz at ambient-coolable voltages. That's simply not the case with the new Ryzen processors.

    I like where AMD are going with Ryzen and I'm saving my pennies for a 3900X, but I'm glad these boost scenarios are being explored and I hope they are more transparent with future releases.
    Reply
  • UncleElias 30 July 2019 06:51
    admin said:
    Not to mention the 12-core Ryzen 9 3950X. We'll certainly be busy at our test benches.

    Typo?
    I'm looking forward to your testing of the 12 core 3900X and 16 core To be released 3950X.
    Reply
  • mdd1963 30 July 2019 08:00
    "not all cores can reach the advertised boost frequency'?

    That's a pretty big understatement...

    It seems lucky for many users if even the best single core can hit only 50-100 MHz below it....for 1/4 second or so...and many seemingly are lucky to achieve even 100 MHz below it...

    All core? Most definitely, subtract 200-300 MHz...maybe 400 MHz...

    I'd not be surprised to eventually see some 'class-action' activity involving attorneys, frankly...; I don't think AMD's little 'you need to understand' sponsored lectures really help much.
    Reply
  • redgarl 30 July 2019 11:53
    Okay, the CPU have been released for a mere 3 weeks. How do we know it is not related to BIOSes? You lost all credibility with Just Buy It!
    Reply
  • greenreaper 30 July 2019 12:13
    AlexTSG said:
    Gen that AMD wants to use as much of the silicon they produce as possible, I wonder if we'll see 6 and 8 core processors that utilize two processor chiplets, where only 3 or 4 of the cores are active.
    It's more likely we'll see those put into Athlon as single chiplets, although what you envisage could be suitable for low-end EPYC designed for storage servers. Ryzen isn't the high-end brand, but it's also not the low-end.

    Of course, they could do Athlon as a no-graphics derivative of the Zen 2 APU instead, which may be a monolithic integrated design, sans chiplets, as in Zen 1.
    Reply
  • 13thmonkey 30 July 2019 12:57
    Will this improve with time? Will next year's chips behave differently, given how close to the edge they are perhaps they will. Intel have sufficient headroom that you may not notice any beneficial drift, other than in the most extreme of max OC's
    Reply