386: 32-Bit and Cache Memory
Intel’s 80836 was the first x86 with a 32-bit architecture. Several versions of this processor were offered. The two best known are the 386 SX (Single-word eXternal), which had a 16-bit data bus, and the 386 DX (Double-word eXternal) with a 32-bit data bus. Two other versions are worth noting, though: the SL, which was the first x86 to offer management of a cache (external) and the 386EX, used in the space program (the Hubble telescope uses this processor).
Code name | P3 |
Date released | 1985 |
Architecture | 32 bits |
Data bus | 32 bits |
Address bus | 32 bits |
Maximum memory | 4096 MB |
L1 cache | 0 KB (controller sometimes present) |
L2 cache | no |
Clock frequency | 16-33 MHz |
FSB | same as clock frequency |
FPU | 80387 |
SIMD | no |
Fabrication process | 1,500-1,000 nm |
Number of transistors | 275,000 |
Power consumption | 2 W @ 33 MHz |
Voltage | 5 V |
Die surface area | 42 mm² @ 1µ |
Connector | 132 pins |