Roadmap 2000: Tidbits from AMD and Intel

Intel's CPU Plans For 2000

  • Slot1 is supposed to die a slow, but certain death . Now that Intel's processors don't require an external L2-cache anymore, there's hardly any reason for the cartridge-version (SECC2) of their CPUs, which is fitting in the good old Slot1. In the second quarter of this year Intel wants to ship 50% of their processors in the FC-PGA version for Socket370. Slot1 is not supposed to host any processors that run faster than 1 GHz and there might be a price premium for the Slot1-versions of Pentium III in the second half of this year.
  • In the third quarter of 2000, Intel is planning to launch the Pentium III at 933 MHz . Currently there don't seem to be any plans of supplying 900 or 950 MHz version for the 100 MHz FSB. Supposedly there is a problem to offer multipliers of x9 and x9.5. I consider this as pure hoax though. It might well be that Intel will launch Pentium III 900 and 950. The multiplier is not an issue at all. Celerons can do x9 (Celeron 600) already and x9.5 is not far off as well. The setting for this frequency could e.g. be the old x4, x4.5 or x5 setting.
  • 'Willamette' , the highly discussed successor of 'Coppermine', is supposed to be launched at 1.3 and 1.4 GHz in Q4/2000. 1.5 GHz and above is expected for the beginning of 2001. One of the discussions I've seen recently is going on about the so-called 'MHz-gap' between the 'Coppermine' at 1 GHz and the 'Willamette' at 1.3 GHz. I don't see why this should be an issue worth going on about. Who can tell me if 'Willamette' at 1.3 GHz is even going to be faster than 'Coppermine' at 1 GHz? There are enough people who seriously doubt that, including yours truly.
  • The latest Celerons at 566 and 600 MHz are finally using the 'Coppermine' core as well, but one half of its L2-cache is disabled. This procedure in combination with Celeron's pathetic 66 MHz FSB is supposed to make sure that there will still be an artificial performance delta between Celeron and Pentium III. To me this is as if Chrysler would sell a cheap Viper that is missing 5 sparc plugs and using narrow tires. Intel might change their 66 MHz FSB policy once AMD releases its 'Spitfire' processor though. What else can they do?
    Currently Intel's plans are not looking like it though. Celeron 633, 667 and 700 are supposed to be launched in Q4/2000 and Q1/2001 is supposed to bring us Celeron 733 and above.

Intel's Chipset Plans For 2000

  • In June 2000 Intel will bless us with its 'ICH2' chip . This 'south bridge' or 'I/O Controller Hub 2' will come with an ATA100 interface, offering up to 100 MB/s data throughput for IDE hard drives. It will also supply 4 USB hubs, and a 6 channel AC97 Codec for the ones that like using the low-cost AMR-solution for sound. Last but not least 'ICH2' will sport an integrated LAN, which requires an additional 'PHY' chip though. Combining 'ICH2' instead of 'ICH' with i820, i840 and i815 will make i820e, i840e and i815e out of them.
  • The most anticipated Intel chipset this year is clearly 'i815' or 'Solano' , actually called 'i815e' or 'Solano2' if 'ICH2' is used with it. 'Solano' will be Intel's first chipset with PC133 support, thus marking the strongly demanded alternative to Intel's doomed Rambus-chipsets i820 and i840. Solano will support all the other goodies of Intel's latest chipset generations, like AGP4x and the 'Hub Architecture' and it will come with an integrated 3D-decelerator as well. This integrated graphics solution can be turned off however, and an external AGP-graphics card can be used with it instead. The expectations are high for 'i815', since it should definitely perform better than the highly regarded '440BX' chipset and thus outperform any Rambus-chipset. However, Intel would contradict itself if their low-cost i815 should make the glorious i820 and i840 look bad. Let's see what the outcome will be. Intel can only lose. Either the chipset performs great and Intel proves that RDRAM is obsolete, or the chipset performs bad due to deliberately integrated speed impediments, but then nobody will want it.
    'Solano' is supposed to be launched in June2000, but Intel's official words about its availability reads like this: "limited supply for distribution channel ." i815 is not supposed to be in 'full production' any time before Q4/2000. This way Intel is trying to make sure that even the last BX-supporter has forgotten about the virtues of PC133 SDRAM.
  • I wasn't quite sure where to put 'Timna' , and it might belong in the 'CPU'-section, but I hope you'll read about it here as much as you would have in the above chapter. This combination of a Celeron processor with Coppermine-128 core and the 'GMCH' is obviously targeted to the low-cost segment. 'GMCH' is probably standing for 'Graphics and Memory Controller Hub', and it illustrates 'Timna's' special design integrating a processor, graphics and memory controller in one chip, known as 'system-on-a-chip solution. Timna will fit into a socket called 'Socket370S', obviously using more pins than Socket370. Combining Timna with 'ICH' or 'ICH2' will make a complete system while keeping the costs extremely low. There's one funny flaw in this chip though. Originally Timna was supposed to work with RDRAM, but the horrendous price tag for this rather unpopular memory type is way too high for a low-cost solution. Thus Intel announced that Timna will work with the rather cheap PC100 SDRAM, but I am not quite clear if this will require an external 'MTH' memory translator hub and thus adding to the system costs, or if the 'MTH' will be built into Timna. Whichever it may be, it doesn't make any kind of sense, as we all know of the dramatic performance loss if the data stream has to be translated into the Rambus protocol and then back into the SDRAM 'protocol'.
    Timna is supposed to ship in September 2000 at speeds of 600 and 667 MHz, obviously using the 66 MHz FSB internally, which comes across particularly laughable. 700 and 733 MHz versions are expected for Q1/2001.
  • Last but not least there is i850 or 'Tehama '. This chipset builds the platform for Intel's upcoming super-processor 'Willamette'. It supports Willamette's new 'Socket423', 400 MHz FSB (quad pumped 100 MHz), two Rambus channels and PCI64/66. Its release will obviously go hand in hand with 'Willamette's', so expect it in Q4/2000