Silicon Motion SM2256 Preview

By Chris Ramseyer
published

Mixed Workload And Steady State Testing

In the past, we could look at four-corner performance to get a good idea of how a product would act in the real world. That's no longer the case, though. Mixed-workload tests yield more useful info on what your SSD does while multitasking and running background software. 

Our mixed workload testing is described in detail here, and our steady state tests are described here.

Our new mixed workload tests show performance at several queue depths with 80% reads and 20% writes. The SM2256 comes up short of several existing SSDs, but proves quicker than SanDisk's Ultra II (a low-cost drive with SanDisk three-bit-per-cell flash).

Silicon Motion fares a bit better when we benchmark with random data.

This set of tests typifies a sequentially-accessed mixed workload at steady state. It's an extreme use case - for example, what you might see after several hours of editing large video files and then rendering to the same drive. Most users won't experience anything quite like this. 

When I first created this chart, I didn't expect to see any product spike and dip so wildly. But the SM2256 is all over the place. Its steady state 4KB performance varies more than any other SSD I've ever tested.

This chart illustrates the final 100 seconds of our test. Again, steady state benchmarking is well outside what we consider normal usage, but we still get a good idea of how well a product might perform in a RAID environment. We look for consistent behavior across the graph, without wild peaks and valleys. That's the opposite of what Silicon Motion's sample drive shows us when it's taxed by 4KB writes for hours.

Chris Ramseyer
Chris Ramseyer
Chris Ramseyer is a Contributing Editor for Tom's Hardware US. He tests and reviews consumer storage.
Topics
SSD
Storage
11 Comments Comment from the forums
  • Maxx_Power
    I hope this doesn't encourage manufacturers to use even lower endurance NAND in their SSDs.
    Reply
  • InvalidError
    15495485 said:
    I hope this doesn't encourage manufacturers to use even lower endurance NAND in their SSDs.
    It most likely will. Simply going from 20-22nm TLC to 14-16nm will likely ensure that with smaller trapped charge, increased leakage, more exotic dielectric materials to keep the first two in check.
    Reply
  • unityole
    this is the way where we are heading, only thing to get good grade SSD is probably to spend big. good grade as in HET MLC flash and pcie 3.0 performance.
    Reply
  • alextheblue
    As long as they don't corrupt data, I'm not really freaking out over endurance. When a HDD died, that was a major concern. If an SSD that's a few years old starts to really reach the end of its useful life, as long as I can recover everything and dump it onto a new drive, I'm happy.

    If you have a really heavy workload though, by all means get a high-end unit.
    Reply
  • JoeMomma
    I am using a small ssd for Windows that is backup weekly. Saved my butt last week. Speed is key. I can provide my own reliability.
    Reply
  • jasonkaler
    Here's an idea:
    While they're making 3d nand, why don't they add an extra layer for parity and then use the raid-5 algorithm?
    e.g. 8 layers for data, adding 1 extra for parity. Not that much extra overhead, but data will be much more reliable.
    Reply
  • InvalidError
    15517825 said:
    Here's an idea:
    While they're making 3d nand, why don't they add an extra layer for parity and then use the raid-5 algorithm?
    e.g. 8 layers for data, adding 1 extra for parity. Not that much extra overhead, but data will be much more reliable.
    SSD/MMC controllers already use FAR more complex and rugged algorithms than plain parity. Parity only lets you detect single-bit errors. It only allows you to "correct" errors if you know where the error was, such as a drive failure in a RAID3/5 array. If you want to correct arbitrary errors without knowing their location beforehand, you need block codes and those require about twice as many extra bits as the number of correctable bit-errors you want to implement. (I say "about twice as many" because twice is the general requirement for uncorrelated, non-deterministic errors. If typical failures on a given media tend to be correlated or deterministic, then it becomes possible to use less than two coding bits per correctable error.)
    Reply
  • jasonkaler
    15519330 said:
    15517825 said:
    Here's an idea:
    While they're making 3d nand, why don't they add an extra layer for parity and then use the raid-5 algorithm?
    e.g. 8 layers for data, adding 1 extra for parity. Not that much extra overhead, but data will be much more reliable.
    SSD/MMC controllers already use FAR more complex and rugged algorithms than plain parity. Parity only lets you detect single-bit errors. It only allows you to "correct" errors if you know where the error was, such as a drive failure in a RAID3/5 array. If you want to correct arbitrary errors without knowing their location beforehand, you need block codes and those require about twice as many extra bits as the number of correctable bit-errors you want to implement. (I say "about twice as many" because twice is the general requirement for uncorrelated, non-deterministic errors. If typical failures on a given media tend to be correlated or deterministic, then it becomes possible to use less than two coding bits per correctable error.)

    No you don't. Each sector has CRC right?
    So if the sector read fails CRC, simply calculate CRC replacing each layer in turn with the raid parity bit.
    All of them will be off except for one with the faulty bit.
    And these CRC's can all be calculated in parallel so there would be 0 overhead with regard to time.
    Easy huh?
    Reply
  • InvalidError
    15536005 said:
    No you don't. Each sector has CRC right?
    So if the sector read fails CRC, simply calculate CRC replacing each layer in turn with the raid parity bit.
    All of them will be off except for one with the faulty bit.
    And these CRC's can all be calculated in parallel so there would be 0 overhead with regard to time.
    Easy huh?
    If you know which drive/sector is bad thanks to a read error, your scheme is needlessly complicated: you can simply ignore ("erase") the known-bad data and calculate it by simply XORing all remaining volumes. But you needed the extra bits from the HDD's "CRC" to know that the sector was bad in the first place.

    In the case of a silent error though, which is what you get if you have an even-count bit error when using parity alone, you have no idea where the error is or even that there ever was an error in the first place. That's why more complex error detection and correction block codes exist and are used wherever read/receive errors carry a high cost, such as performance, reliability, monetary cost or loss of data.
    Reply
  • Eggz
    I know this article was about the SM2256, but the graphs really made the SanDisk PRO shine bright! In the latency tests, which content creators care about, nothing seemed to phase it, doing better than even the 850 Pro - consistently!

    BUT, one significant critique I have was the density limitation. Everything here was based on the ~250 GB drives. Comparing a drive with the exact name, but in a different density, is akin to comparing two entirely different drives.

    I realize producing the data can be time consuming, but having the same information at three density points would be extremely helpful for purchasing decisions - lowest, highest, and middle densities.
    Reply