TSMC began mass production of chips based on its first N3 (3nm-class) fabrication process several months after Samsung Foundry kicked off high-volume manufacturing using its 3GAE (3nm-class, gate-all-around early) node, but TSMC's yields are dramatically better, according to a report by Business Next that cites various industry analysts and experts, but TSMC hasn't confirmed the reports.
Analysts and experts specializing in semiconductors interviewed by Business Next estimated that at present TSMC's N3 yields could be as low as 60% to 70% or as high as 75% to 80%, which is quite good for the first batch. Meanwhile, financial analyst Dan Nystedt tweeted that TSMC's current N3 yields are similar to N5 yields early in its ramp-up, which, according to media, could be as high as 80%.
By contrast, Samsung Foundry's 3GAE yields at the early stages varied from 10% to 20% and have not improved, according to the report that cites industry sources without elaborating. Furthermore, the variability of chip quality was very high, the report says.
While estimates vary greatly, there are several things to be noted about TSMC's current N3 yields. First up, we do not know whether yields are calculated for commercial wafers running through TSMC's Fab 18, or for commercial and shuttle (test) wafers containing various IPs of TSMC's customers. Secondly, nobody except TSMC and its customer(s) knows the exact yield rate of either commercial or shuttle wafers at this point. Thirdly, if we only consider commercial wafers, for now TSMC's N3 is used to make a very limited number of designs for early adopter(s), albeit this is based on market rumors.
Keeping in mind that TSMC tends to develop its leading-edge production technologies with Apple's — its biggest customer and its alpha client for leading-edge nodes — requirements in mind and the Cupertino, California-based high-tech giant tailors its designs for TSMC's capabilities, it is not surprising that initial yields could be as high as 80%. Meanwhile, a 60% yield rate may not be exactly high for a chip (or chips) set to power mass-market products.
In any case, since the number of N3 designs TSMC produces commercially is limited (we would speculate that it hardly exceeds three ICs) for now and the yields-related data is a well-kept trade secret of the foundry and its clients, we cannot make any judgments about how high or low TSMC's N3 yields are.
In fact, for the same reason, we would refrain from comparing TSMC's N3 yields to Samsung Foundry's 3GAE yields in its early stages.
Furthermore, bearing in mind rumors surrounding the initial N3 node (aka N3B), Apple could be the only company to adopt this technology at all as other developers are set to use N3E which has an improved process window. Meanwhile early N3 yields may not be applicable to N3E (and other nodes from family of its N3 technologies) and this process technology is actually something that the industry at large should care about since it is going to be used widely.
Modern semiconductor production technologies contain thousands of process steps and depend on materials, fab equipment tools used, process recipes, and a multitude of other factors. Therefore, there could be thousands of ways to improve or lower yields, which is why it is important to have a very deep understanding of how one factor affects others. Since TSMC's N3 (N3B), N3E, N3S, N3P, and N3X are very different manufacturing technologies, early N3 yields are good signs for the rest, but they do not guarantee that other nodes will be as successful (or not as successful).
Keep in mind that TSMC did not comment on the news story (and they never will comment on yields), so take all the numbers with a grain of salt.
You can still imagine a situation where all the parameters are optimally tuned and they still can't reach adequate yields. I'm not saying it'll happen to these nodes, but it seems like Intel has been struggling with some yield problems they couldn't simply optimize away, in recent years.
To make yield values be product agnostic, I think it'd have to be stated in terms of defects per wafer or per unit area, or something like that.
Many people would gladly purchase them for art to hang on a wall or put on a shelf.
DO this!! Wall art that originally cost six or seven figures to make would indeed be a conversation piece. :)
But I can think of several reasons why bad chips should never leave the plant, so we probably won't be seeing art from them.
it does get recycled. However Intel used to give away some failed ones as teaching aids to schools, to museums, as well as memorabilia to its important clients at milestones and anniversaries (mind you decades ago). But to my knowledge, they never technically sold them.
there's also intel museum at its HQ in Santa Clara, CA. it's free admission and you can really see all of it from crystal to whole systems there, well worth the visit if you're in the area
You could totally sell them as clocks and keychains.
I once bought an old i486 CPU for a couple bucks, at a flea market. No idea if it worked, but it later fell on the floor and cracked the ceramic package and the metal plate on the bottom fell off. So, I now have it propped up to display the chip and it's pretty interesting to look at. No matter that the tech is so old.