Patriot has revealed an engineering preview of the company's upcoming CKD DDR5 memory, which will compete with the best RAM on the market. The big news is that Patriot has installed a clock driver (CKD) with the DDR5 memory module to help increase the JEDEC speed to DDR5-7200 and unlock higher overclocking ceilings, too.
A clock driver is a small chip whose primary function is to serve as a buffer between the memory controller and chips on the memory module. It isn't a novel idea, nor is Patriot the first to do it. TeamGroup did the same thing with its mainstream Elite and Elite Plus lineups. Furthermore, server-grade memory modules, like Registered DIMMs (RDIMMs), have had a similar implementation as a registering clock driver (RCD). The RCD acts like a middleman, receiving instructions from the processor before dispatching the instructions to the memory module. The downside is that the data sticks around in the RCD for one clock cycle before going on its way. However, the greater upside is that RCD significantly lessens the stress on the processor's memory controller.
Most current DDR5 memory modules default to DDR5-4800 to align with JEDEC's baseline to ensure maximum compatibility with AMD and Intel platforms. However, high-frequency memory kits, such as the G.Skill Trident Z5 RGB DDR5-7200 C36, are starting to arrive with DDR5-5600 as the baseline. Remember that this is the default frequency before overclocking the memory via Intel XMP 3.0 or AMD EXPO.
With a clock driver, Patriot aims to enhance the baseline speed of the brand's future DDR5 memory kits. The company is targeting DDR5-6400; however, that's far from the ceiling. There are many clock driver providers on the market, including Renesas, Rambus, Montage Technology, and One Semiconductor. Solutions from Renesas and Rambus scale up to DDR5-7200, whereas One Semiconductor states that its clock driver supports up to DDR5-8400. Patriot didn't reveal which supplier the company uses for the clock drivers, though,
Future Patriot memory modules with a CKD onboard will run at DDR5-6400 right out of the box without user input. Intel's current 14th-Gen Raptor Lake Refresh processors and AMD's Ryzen 7000 processors have native support for DDR5-5600 and DDR5-5200, respectively. However, that shouldn't matter since the clock driver should enable Patriot's DDR5-6400 memory to be plug-and-play on Intel and AMD chips, regardless of the integrated memory controller (IMC) quality.
Clock drivers adhere to the JEDEC DDR5CK01 standard, which defines a 1.1V threshold. Therefore, the tradeoff is that Patriot's DDR5-6400 memory modules will likely not have the best timings in the category. For example, TeamGroup's Elite and Elite Plus DDR5-6400 have 52-52-52-103 timings. They can't compare to enthusiast DDR5-6400 with timings in the low and middle 30s, but then again, the CKD DDR5-6400 memory doesn't pull 1.35V or 1.4V, either.
One of the greater benefits is that the CKD will probably improve the overclocking ceiling. With the processor's IMC out of the picture, the chances of achieving higher overclocks are higher. TeamGroup is already eyeing DDR5-9000 with its CKD-equipped memory kits.
DDR5 is expensive by nature because it requires more components to manufacture. Adding a power management IC (PMIC) contributed to the cost increase, so we can safely assume that Patriot's CKD memory kits will likely cost a small premium because those clock drivers don't come free. Sadly, Patriot didn't provide an estimated time of arrival for the new CKD memory kits. However, its display does show that the company is ramping up the key packaging tech needed to deliver this feature in high-volume manufacturing.
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Very informative. I really appreciate the background info. I had seen mention of RCDs mentioned before, but I thought it was a nice touch to relate these CKDs to them.Reply
Also, thanks for mentioning the relation between voltage and timings. It's not surprising to me, but I didn't know as hadn't been tracking that.
I hope this sort of thing becomes virtually standard on all but the cheapest DDR5 DIMMs.
I'd love to see if this has any real world impact on overclocking. I'm not aware of any high frequency XMP/EXPO kits featuring a clock driver outside of RDIMMs where it's required.Reply
The timings referred to in the article are just JEDEC 6400 timings so I could see where it could help with frequency while keeping voltage at 1.1v now since no IMC natively supports 6400. If the clock driver is effectively required to maintain those clocks to meet JEDEC specs I could see them becoming fairly common once AMD/Intel move up in base CPU memory spec. Of course at the same time most DDR4 high frequency memory used 2133 baseline instead of 3200 so who knows.
Rather than highest speed, memory needs to become smart, and automatically doing tasks like filling an area of memory with zeros, or a constant, basic bitwise operations, like a constant XOR, mask, vector addition or some basic operations. Even carryless products or carryless additions would be useful, and save a lot of computing time.Reply
Zhiye Liu, I have enjoyed this article as well as others you have written. Quite simply, I would like to know where this new Patriot memory falls into the "Best RAM for Gaming: DDR4, DDR5 Kits for 2024" article you wrote.Reply
Don't short-circuit and burn the place down trying to figure it out. ;)
I think that wouldn't help much. First, those aren't things CPUs spend much time doing. Zeroing memory is the only one worth taking seriously, but even that is really tweaking at the margins.yeyibi said:Rather than highest speed, memory needs to become smart, and automatically doing tasks like filling an area of memory with zeros, or a constant, basic bitwise operations, like a constant XOR, mask, vector addition or some basic operations. Even carryless products or carryless additions would be useful, and save a lot of computing time.
Second, the operations can't break cache-coherency, which means work for the CPU, anyhow. You'd have to flush or invalidate all of the cache lines for the address range + bring in the new data from memory, since it would presumably happen when you're about to use it. Together, you've now spent a large fraction of the cost of just having the CPU do it.
Third, if the operation would be truly expensive, then it's going to be asynchronous and that would introduce synchronization overhead.
To provide a significant benefit, you have to look at more complex operations, like convolutions. That's what Samsung and SK Hynix have been working on.
Did you see this part?thestryker said:I'd love to see if this has any real world impact on overclocking. I'm not aware of any high frequency XMP/EXPO kits featuring a clock driver
"It isn't a novel idea, nor is Patriot the first to do it. TeamGroup did the same thing with its mainstream Elite and Elite Plus lineups."
Are those kits not XMP/EXPO?
They are not, but the 6400 is only officially compatible with refreshed Z790 while 6000 is listed as fully compatible with Intel.bit_user said:Are those kits not XMP/EXPO?
How are there so many makers of CKD chips, when none of the performance-oriented DIMMs are using them? Seems contradictory, but maybe it's just the next big thing and enough chipmakers figured that out?thestryker said:They are not, ...
... because they are too expensive.bit_user said:First, those aren't things CPUs spend much time doing.
Not a problem, because the programmer would know, before using it, and would know when to use it.bit_user said:Second, the operations can't break cache-coherency, which means work for the CPU, anyhow.
An use case is to process an array speculatively assuming that only 5 bits are required, but then finding that actually 6 bits are required. Then the past calculations become useless, so it better to assume 8, or 16 bits, even when it wastes space, leaves most bits unused, and is slower to process.
But a smart memory could be commanded to convert the past data to 6 bits (which involve carryless arithmetic), so the CPU would continue processing the rest of the array meanwhile the RAM reformats the already processed array. There is no cache conflict, because the CPU is occupied with a different area of memory.
I thought it was just part of the spec in more of a "if you need it" type capacity, but according to Renesas it's a requirement once you hit 6400. So I'd assume everyone making CKDs are also companies making RCDs and they just got a jump on manufacturing since DDR5 base specs have been moving rapidly. Granite Rapids is 6400 which leads me to believe ARL will be as well which means volume production will already be necessary.bit_user said:How are there so many makers of CKD chips, when none of the performance-oriented DIMMs are using them? Seems contradictory, but maybe it's just the next big thing and enough chipmakers figured that out?