Not Downward Compatible
PCI-Express interface block diagram of E7525 chipset
The E7525 is manufactured in 90 nm, contained within a flip-chip BGA-casing (ball grid array) and connected to the motherboard via 1077 balls. The integrated CPU interface now operates at a clockspeed of 200 MHz (FSB800), whereby slower clockspeeds such as 133 MHz (FSB533) are no longer supported. Consequently, an older Xeon Prestonia, although it is pin-compatible, cannot be operated on an E7525 system.
The two-channel memory interface is now capable of working with DDR2 400. Here a conservative path has been taken, as DDR2 533, as registered DRAM and ECC, is still not a Jedec Standard. Moreover, it is still possible to use DDR333 or DDR266, but non-registered DIMMs cannot be operated any more - this was still feasible with the previous chipset, E7505.
DDR2-400 memory modules of Infineon, registered, with ECC - recognizable by the suffix "x72", which stands for the increased number of memory bits.
2 GB random access memory is the required minimum for workstation applications in most cases.
