Intel's 3D NAND SSD Debut: DC P3520/P3320 And DC3700/3600
DC P3520 And DC P3320 Series SSDs
Intel is simultaneously launching four datacenter SSDs, which are particularly interesting because the DC P3520 and DC P3320 both employ the company's long-awaited 3D NAND. The jointly developed IMFT flash sets a new standard for density with 32 layers and 256Gb per MLC die and an impressive 384Gb per die of 3D TLC.
The new NAND enables incredible density. We'll see up to 512GB for a 16-die MLC package and up to 768GB in a 16-die TLC package. IMFT 3D NAND employs floating-gate technology, which is quite a bit different than what other NAND fabs are doing with their Charge Trap Flash (CTF). Intel has a long history with floating-gate transistors, and the company believes it can extract more performance and endurance compared to competing CTF designs. IMFT NAND also puts most of the CMOS under the array, which boosts efficiency and density.
We were able to snap a few pictures of the DC P3520 at Intel's Broadwell-EP press briefing. As you can see, the SSD is physically almost identical to the company's existing DC P3700 SSDs.
The DC P3320 comes in capacities as large as 2TB, matching its counterparts based on planar NAND. This is surprising considering the higher density possible with 3D NAND. But Intel indicated that the new design features the same controller as the previous-gen planar NAND-based products. That controller can only address up to 2TB due to DRAM management limitations.
Intel sells the DC P3320 in both 2.5" and add-in card form factors with 450GB (2.5"-only), 1.2TB and 2TB of flash. The company rates its DC P3320 for up to 365,000 random read and 22,000 random write IOPS. Those write numbers are similar to the low-endurance DC P3500 (23,000 IOPS), but the random reads are not nearly as fast as the DC P3500's 430,000 IOPS. The DC P3320 offers up to 1600 MB/s sequential reads and 1400 MB/s of sequential writes, which also lags its NVMe-based predecessors.
Intel attributes the lower performance to a loss of parallelism due to higher-capacity 3D NAND dies. Future models will sport an improved controller that manages more DRAM, thereby accommodating more capacity and parallelism, which ultimately improves performance. Intel doesn't get specific, but indicates that the DC P3320 will feature a lower price than the DC P3500 and a similar write endurance rating (0.3 DWPD for five years).
Intel continues its focus on performance consistency, touting the end-to-end data path protection that provides a resilience to silent data corruption. Intel is one of the few storage vendors confident enough to share field reliability data, and it continues to maintain an Annual Failure Rate (AFR) below 0.44%.
Intel also mentioned the new DC P3520 during its briefing. However, the company did not share any performance details. We did uncover a document last August that accurately foretold the DC P3608's release though, and it included information on the DC P3520. The slide above is a bit dated at this point; its listed availability was originally anticipated in Q4 2015. But other information in the same document proved true, so we are fairly confident that it still reflects the projected specifications. At the very least, Intel hinted that the DC P3520 will be a performance-oriented model, which agrees with the numbers listed above.
Intel DC D3700 And DC D3600 Series SSDs
Intel also announced dual-port active-active NVMe-based SSDs at the event, which closely resemble the 2.5" DC P3700 NVMe SSD we recently tested and the 2.5" DC P3320 pictured above.
SAS-attached SSDs still enjoy the advantage of two ports, which provide an active-active connection for High Availability (HA) features like multi-path and fail-over. These are extremely important in mission-critical applications, and NVMe's original lack of dual-port functionality hampered its adoption in many of the long-held SAS-based SSD bastions, such as all-flash arrays. In fact, we dinged the 2.5" Intel DC P3700 NVMe SSD for that exact reason in our review earlier this month.
The NVM Express consortium added dual-port support to later revisions of the standard, and Intel's DC D3700 and DC D3600 SSDs provide two PCIe 3.0 x2 connections into compatible backplanes. Although this allows multiple hosts to access the SSDs, it also cuts performance in half, from a top speed of 470,000 random 4KB read and 95,000 write IOPS, and 2100 MB/s sequential read 1500 MB/s sequential write throughput.
Intel's new NVMe SSDs are only available in a 2.5" form factor, and they require special backplanes to take advantage of the dual-port functionality. You'll only find the DC D3700 at 800GB and 1.6TB capacity points, though you get 10 DWPD of endurance. The DC D3600 is available in 1 and 2TB capacities with a 3 DWPD rating.
Features supported by the drives are similar to what you get from SAS-based SSDs, including reservations, scatter/gather lists, multiple namespaces and in-controller memory buffers. Intel indicates that the mulitple namespace capability runs in hardware, which is better than SAS' software-based approach, increasing efficiency.
In most server applications it doesn't matter as much as multithreaded performance. If you need single-core strength, getting a consumer chip is actually better, but you probably aren't running a server if single-threaded is your focus.
And the fact that Intel even released low-core high-clock SKUs is an acknowledgement of this continuing need. Clock just not as high as I'd read. With the other specs basically matching the Haswell version, the only difference is ~5% IPC improvement. Seems pretty poor improvement, for a die-shrink.
Model: Intel Xeon E5-2602 V4
Base clock: 5.1 GHz
Turbo clock: TBD
L3 Cache: 5 MB
Given what we know about 2.5 MB/core of L3 Cache, the 5 MB figure sounds suspicious. It's conceivable they could disable some to hit the target TDP, I guess.
I'm not saying the 5Ghz rumor is true but Intel has always known which chips can hit higher clocks during certification if the chip is a top end or low end chip cores disabled etc. I'm sure they could cherry pick a few to sell for $$$ if they wanted. Now are they I have no real idea.
There are obviously things you can do in chip design that allow one to reach different timing targets. And I was hoping they might've refined their 14 nm process, since the time the first Broadwells launched. So, I thought, with more TDP headroom afforded by this socket (roughly double what Skylake has to work with), maybe they could do it.
I thought maybe Intel was addressing some pent-up demand for high clockspeed applications. That said, it seemed particularly odd in Broadwell, given that it generally seems oriented towards lower clockspeed / lower power applications.
But maybe it was a typo, or even a blatant lie, in order to track down leakers.