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Extreme Overclocking: 10 Ryzen CPUs Under LN2

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OC: Ryzen 5 1500X & 1400

Ryzen 5 1500X: 5030 MHz

We won't drag things out on you. As we dropped down AMD's Ryzen stack, the maximum frequencies continued to fall. Despite starting off great with a Ryzen 7 1800X that exceeded 5.3 GHz, our 1500X barely crossed the 5 GHz mark. It managed to complete Cinebench successfully at 5030 MHz and a voltage of 1.85V.

When we ran our benchmarks, there were no results on HWBOT using LN2 cooling. So we took advantage of the opportunity to fill the ranks with 13 first-place finishes. To be honest, though, there is no glory in breaking a record when the best competition is only using water cooling. At least future extreme overclockers have a challenge to beat now.

Ryzen 5 1400: 5000 MHz

The last of our 10 processors is the worst of all. It simply doesn't like high voltages, and it stops progressing at 1.8V. Under these conditions, 5 GHz was the limit for Cinebench R15.

This is a disappointment for the enthusiasts who hoped lower core-count Ryzens might be capable of higher clock rates. But it's a logical outcome, given the way AMD bins its dies. The best performers naturally turn into 1800Xes, with all of their cores activated and operating at the highest frequencies.

At least this chip's IMC isn't terrible. It reached 3100 MT/s at CAS 12. The processor didn't have any issues with bugs, and it accepted -196°C without a problem. The test would have been downright enjoyable if we could have squeezed out an extra 300 MHz.

As with the 1500X, we took advantage of the absence of LN2-based scores to place our own.


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Jean Michel "Wizerty" Tisserand
Jean-Michel "Wizerty" Tisserand is a French extreme overclocker, and former OC world champion. Passionate and curious, he's always into pushing hardware to its limits. Willing to transmit his knowledge, he created the French Overclocking Federation, and writes merciless hardware torture articles!
32 Comments Comment from the forums
  • InvalidError
    It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over.
    Reply
  • Yuka
    19937674 said:
    It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over.

    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties, hence, making the rumour mill of being able to unlock some 4C and 6C to higher core counts not that far-fetched.

    Cheers!
    Reply
  • Wisecracker
    Très bon!
    (hope I used this correctly)

    Just wondering ... would it be considered a 'faux pas' (or, an insult to AMD) to release the batch numbers?

    Reply
  • theyeti87
    19937697 said:
    19937674 said:
    It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over.

    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties, hence, making the rumour mill of being able to unlock some 4C and 6C to higher core counts not that far-fetched.

    Cheers!

    Wasn't that a similar case with the Phenom X4, X3, and X2's? Or were those 3's and 2's disabled cores due to defect?
    Reply
  • Yuka
    19937706 said:
    19937697 said:
    19937674 said:
    It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over.

    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties, hence, making the rumour mill of being able to unlock some 4C and 6C to higher core counts not that far-fetched.

    Cheers!

    Wasn't that a similar case with the Phenom X4, X3, and X2's? Or were those 3's and 2's disabled cores due to defect?

    They were a mix of both. If you were lucky (and could track down some of the batches) you were able to unlock the CPU with little worry, but there were defective ones that when unlocked, would not work. I came across both myself.

    To be honest, I just catalog it as "interesting", because I will pay the difference to always get the full working version, but I do know there's people out there that like gambling and can track batch numbers :P

    Cheers!
    Reply
  • InvalidError
    19937697 said:
    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties
    The relatively low defect rate has been a given since launch IMO: half of each CPU core is L2 cache and half of the CCX die area is the L3, so you have a 50% chance that defects within a CCX will land in L3. If the defect rate had been significant, cache defects would have forced AMD to launch models with 8MB of L3 long before the 1400.
    Reply
  • Yuka
    19937880 said:
    19937697 said:
    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties
    The relatively low defect rate has been a given since launch IMO: half of each CPU core is L2 cache and half of the CCX die area is the L3, so you have a 50% chance that defects within a CCX will land in L3. If the defect rate had been significant, cache defects would have forced AMD to launch models with 8MB of L3 long before the 1400.

    True. It's just nice to have more non-validated statistical-irrelevant proof! Haha.

    Cheers! :P
    Reply
  • Gregory_3
    This is all kind of cute, but the real market success will be played out in conventional liquid cooled and air cooled environments. Nobody is going be running high end software with condensation dripping all over.
    Reply
  • InvalidError
    19938043 said:
    Nobody is going be running high end software with condensation dripping all over.
    There wouldn't be condensation issues if OCers used the nitrogen gas boiling out of the pot to displace air and the moisture it contains around the motherboard to keep it off of it. Instead of circulating the boil-off around the motherboard though, LN2 OCers use fans to suck it away, drawing more moisture-ladden air in the area.
    Reply
  • gasaraki
    "It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over."

    While it might not be surprising, it shows the immaturity of the Ryzen processors in that the build quality is not the same between different CPUs or even CCXes and binning is what they do for the lower cored versions. If your build process was mature ALL your chips would come out mostly the same and "awesome" then at that point your forced to just shutdown cores to make the lower cored processors.
    Reply