Extreme Overclocking: 10 Ryzen CPUs Under LN2

OC: Ryzen 7 1800X

Since we have multiple Ryzen 7 1800X CPUs, each one gets its own number. Our freshly lapped processor is first.

Ryzen 7 1800X #1: 5411 MHz

The temperature drops, frequencies increase, but our optimism does not last for long. This CPU wouldn't stabilize at 5420 MHz, and it's just barely able to run at 5400 MHz. With a little work, and by tweaking the settings, we manage to pass GPUPI at 5411 MHz, reducing the three-second delta to just 0.9s.

We score a beautiful 2430 points in CineBench R15 at 5323 MHz, again falling short of first place. Our CPU is a good one, but it isn't setting any records.

Before moving on to other samples, we make note that this chip's IMC is quite average. Under LN2 cooling, it's impossible to push our memory beyond 3000 MT/s. Unable to achieve higher data rates, we instead tighten timings to 11-11-11-26 and use a REF_CLOCK setting of 139 MHz to boost our score a bit.

Ryzen 7 1800X #2: 5200 MHz, DDR4 At 3310 MT/s

Our second sample isn't quite as good as the first one. As a result, we didn't spend a lot of time trying to push its performance. After assembling and waterproofing our platform, we spent another two hours toying with the chip's limits. In the end, Cinebench ran successfully at a little higher than 5200 MHz.

Incidentally, this CPU's memory controller is quite good. It allowed us to complete SuperPI 32M with a memory frequency of 1655 MHz (3310 MT/s).

MORE: Best CPUs

MORE: How To Overclock AMD Ryzen CPUs

MORE: De-Lidding and Overclocking Core i7-7700K

MORE: CPU Overclocking Guide: How (and Why) to Tweak Your Processor

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  • InvalidError
    It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over.
  • Yuka
    Anonymous said:
    It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over.


    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties, hence, making the rumour mill of being able to unlock some 4C and 6C to higher core counts not that far-fetched.

    Cheers!
  • Wisecracker
    Très bon!
    (hope I used this correctly)

    Just wondering ... would it be considered a 'faux pas' (or, an insult to AMD) to release the batch numbers?
  • theyeti87
    Anonymous said:
    Anonymous said:
    It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over.


    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties, hence, making the rumour mill of being able to unlock some 4C and 6C to higher core counts not that far-fetched.

    Cheers!


    Wasn't that a similar case with the Phenom X4, X3, and X2's? Or were those 3's and 2's disabled cores due to defect?
  • Yuka
    Anonymous said:
    Anonymous said:
    Anonymous said:
    It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over.


    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties, hence, making the rumour mill of being able to unlock some 4C and 6C to higher core counts not that far-fetched.

    Cheers!


    Wasn't that a similar case with the Phenom X4, X3, and X2's? Or were those 3's and 2's disabled cores due to defect?


    They were a mix of both. If you were lucky (and could track down some of the batches) you were able to unlock the CPU with little worry, but there were defective ones that when unlocked, would not work. I came across both myself.

    To be honest, I just catalog it as "interesting", because I will pay the difference to always get the full working version, but I do know there's people out there that like gambling and can track batch numbers :P

    Cheers!
  • InvalidError
    Anonymous said:
    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties

    The relatively low defect rate has been a given since launch IMO: half of each CPU core is L2 cache and half of the CCX die area is the L3, so you have a 50% chance that defects within a CCX will land in L3. If the defect rate had been significant, cache defects would have forced AMD to launch models with 8MB of L3 long before the 1400.
  • Yuka
    Anonymous said:
    Anonymous said:
    Even more, it's very interesting since it gives some credibility that AMD is not binning due to defects, but electrical properties

    The relatively low defect rate has been a given since launch IMO: half of each CPU core is L2 cache and half of the CCX die area is the L3, so you have a 50% chance that defects within a CCX will land in L3. If the defect rate had been significant, cache defects would have forced AMD to launch models with 8MB of L3 long before the 1400.


    True. It's just nice to have more non-validated statistical-irrelevant proof! Haha.

    Cheers! :P
  • Gregory_3
    This is all kind of cute, but the real market success will be played out in conventional liquid cooled and air cooled environments. Nobody is going be running high end software with condensation dripping all over.
  • InvalidError
    Anonymous said:
    Nobody is going be running high end software with condensation dripping all over.

    There wouldn't be condensation issues if OCers used the nitrogen gas boiling out of the pot to displace air and the moisture it contains around the motherboard to keep it off of it. Instead of circulating the boil-off around the motherboard though, LN2 OCers use fans to suck it away, drawing more moisture-ladden air in the area.
  • gasaraki
    "It isn't surprising that the highest-end CPUs have the highest and least troublesome overclocks as that's what chip binning is for - the best dies go to the premium SKUs first, lower tiers get what is left over."

    While it might not be surprising, it shows the immaturity of the Ryzen processors in that the build quality is not the same between different CPUs or even CCXes and binning is what they do for the lower cored versions. If your build process was mature ALL your chips would come out mostly the same and "awesome" then at that point your forced to just shutdown cores to make the lower cored processors.
  • islane
    Love this article - this is the sort of thing that keeps me coming back to TH over the years. More like this please.
  • InvalidError
    Anonymous said:
    If your build process was mature ALL your chips would come out mostly the same and "awesome" then at that point your forced to just shutdown cores to make the lower cored processors.

    All manufacturing processes no matter how mature still have variations simply because the various deposition and etch processes aren't perfectly uniform and will vary depending on chip position on the wafer, wafer position in the vapor deposition chamber and countless other such variables. That's why all semiconductor manufacturers have multiple speed grades and whatever other applicable metrics of what is otherwise the exact same IC.

    Disabling cores is just an extra thing that CPU/GPU manufacturers can do to salvage what would have otherwise ended up being a dead/out-of-spec chip and add some extra market segmentation along the way.
  • cinergy
    Cool article!
  • none12345
    Want a simple solution to condensation?

    Positive pressure air bladder. Put the mobo in a bag, cut a small hole for the cpu, silicone arround the socket to seal the bag to the socket. Pass all the wires out the side of the bag(and seal). Use a gpu riser, so you dont have to add another penetration for the pci slot, or you can cut out the pci slot and slicone that as well.

    Then just hook it up to the exhaust port of a shop vac. If you need to you can temperature control and/or dry the air as well. Tho i think the warm exhaust of the shop vac would probably keep the bag warm enough to stave off condensation.

    Dont forget to put a button jumper on the cmos reset, so you can reset without tearing open the bag.

    Wonder why no one is doing this... The towels are dumb. Note im not saying you guys are dumb for using towels, i know its common practice. Its just i think common practice is dumb.
  • pecul1ar
    Nice writeup, and there's a bit of gold nuggets here and there for us non-LN2 users.

    Those two problematic 1700s... where were they made?
  • Malik 722
    the vrm heat sinks were removed completely,is it okay to run the board without them.
  • InvalidError
    Anonymous said:
    the vrm heat sinks were removed completely,is it okay to run the board without them.

    VRM heatsinks do very little to cool the VRMs as there is around a millimeter of epoxy/plastic between the FET die and the heatsink, sticking heatsinks on top of a thermal insulator isn't particularly productive. The bulk of VRM heat goes out through the package's thermal pad connection into the motherboard's ground and power planes - those can be surprisingly effective at moving heat across a board when planes have large uninterrupted copper pours. With the socket chilled beyond -50C, there is nearly unlimited heatsinking available via the motherboard.
  • Glock24
    Nice article. I guess/hope that as the Fab process gets refined and demand for lower priced parts rises, the lower models will not all be of interior silicon, but just good dies gimped to match a given SKU. When/if this happens, an R5 will overclock just as good a the top of the line model.

    Also I wonder what's effort it'll take to lap a giant Threadripper IHS! LOL
  • Rheotome
    Would have liked to seen a bit more detail on the emery cloth abrasive used for lapping. What size grit ? What type abrasive ? I'm wary of using emery anywhere near electronics. Natural emery is Aluminum Oxide or Corundum which is an Insulator. However frequently , Silicon Dioxide is used on Emery Cloth. Silicon Dioxide is a Semiconductor. And we all know that ANYTHING conductive and electronics may not play together well.
  • cmmarco
    In regards to the lapping...is that air gap present in all the chips? could that in itself be a contributing factor in less than stellar overclocking on liquid or air?