Testing at x16, x8, x4, x1
You can limit PCI Express lane count by taping the connectors that aren’t required. Pay attention if you do so.
Once again we taped the pins we didn’t want when we wanted to narrow down the number of PCI Express 2.0 lanes used. No taping was required for x16 PCIe 2.0, while more and more of the 164 pins had to be taped to reduce the link width. If you do this, pay close attention to ensure that you cover the correct pins.
PCIe 2.0 x16
16 PCI Express 2.0 lanes equals the maximum link width of current PCI Express 2.0 graphics cards. The total bandwidth is 8 GB/s upstream and 8 GB/s downstream.
ATI’s Radeon HD 3850 running on 16 PCI Express 2.0 lanes.
