Sans Rambus
Bye-bye Rambus: Intel's memory roadmap shown at Spring IDF confirmed the company's departure from Rambus for its high-end chipsets.
Discussions over memory have traditionally aroused considerable passion and ire, not unlike the constant bantering between the AMD and Intel zealots. But perhaps nothing has brought so many so close to exchanging blows at otherwise civilized industry meetings or generated such incessant threads of hate mail exchanges than the Rambus, Intel, and JEDEC debate.
At the time of the writing of this article, litigation over licensing arrangements between Rambus and alleged patent infringements as well as counter-suits in mostly U.S. courts rages on. Here, no sides will be taken in the legal battle - to paraphrase James Boswell, the 18th century English literary giant and lawyer by training, guilt or innocence is exclusively determined by a jury or judge in a court of law. But while much fury will be incited by merely addressing the issue, this text makes several assumptions: for a long while, Intel unabashedly stuck by Rambus memory, which has generally offered superior performance; Rambus memory is a lot more expensive than mainstream memory; and JEDEC, the standards body, was not happy with the Intel/ Rambus camp, especially since Intel's crème-de-la-crème chipsets have Rambus memory.
But around spring 2002, Intel's relationship with Rambus began to change. In May 2002, Intel began to play catch-up with SiS and Via by launching a series of Pentium 4 chipsets with a 500 MHz bus that supported DDRAM after it had already begun its full-fledged onslaught of high-performance Pentium 4 chipsets using Rambus DRAM (RDRAM).
This was after Intel had based its first Pentium 4 chipset on RDRAM. It took a long time before Intel would even consider adding SDRAM, much less DDRAM, support. Needless to say, RDRAM was never popular in the industry, especially among JEDEC members and memory suppliers, though RDRAM chipsets nevertheless remained inside the fastest Pentium 4 platforms.
Then, during a recent Intel Developers Forum (IDF), Intel dropped the bomb: Intel showcased its two high-end chipsets, codenamed Springdale and Canterwood, which supported single- and dual-channel DDR400 and an 800 MHz front-side bus. Not only that, but Intel's memory roadmap was without Rambus memory.
Samsung Electronics, Hynix Semiconductor, Inc., Infineon Technologies, and Elpida Memory immediately began announcing that they had DDR400 devices ready that met Intel's specs for DDR400 for its 865P/ 865PE/ 865G (Springdale version) chipsets and its 875P (Canterwood).
