RAM Wars: Return of the JEDEC

Memory Specs

In the early days of mainstream PCs in the 1980s, memory was a big deal, with 512K being the standard, while cutting edge enthusiasts would send e-mail and play Tetris (not at the same time) with a combination of Intel x386 processors that had as much as 64 Mbit of RAM.

Then and until the advent of SDRAM, the time it took the processor to send and receive data from RAM was measured in nanoseconds (ns). Fast memory speeds ranged from 80ns to as quick as 60ns.

Megahertz and Bytes-per-second transport speeds did not become the standard of measure until the advent of SDRAM. Today, memory and its bus architectures live and die by both capacity, measured in MBytes, and speed, which is measured in the amount of of data that can be accessed and sent by the memory module, expressed in Bytes (bits multiplied by eight) per second. Equally important is the front-side bus speed between the CPU and memory, which is also measured in MHz and Bytes/s.

An issue of potential confusion is that memory modules are still labeled using nanoseconds as a unit of measure for memory performance. Beginning with DRAM, instead of access time, nanosecond units have measured clock cycle times. DDRAM will likely continue this legacy.

Kingston Technology Company Inc., a leading memory module producer, offers the following table indicating the method for determining speed equivalencies between MHz and ns ratings.

STEP 1

MHz = 1 million clock cycles per second:
66
100
133

STEP 2

Multiply by 1 million to get total clock cycles per second:
66,000,000
100,000,000
133,000,000

STEP 3

Constant: 1 billion nanoseconds per second: 1,000,000,000
1,000,000,000
1,000,000,000

STEP 4

Divide nanoseconds per second (from Step 3) by clock cycles per second (from Step 2) to get nanoseconds per clock cycle:
15
10
8