Athlon XP-64 Core: 95 Percent Athlon
A glance at the CPU core of the long-awaited Hammer: The greatest share of the surface (over 50 percent) is taken up by the 1 MB L2 cache.
On closer inspection the attentive observer might notice that the AMD Hammer's physical foundations look identical to the old Athlon core in many of its details. One of the innovative features of the x86 CPU is the integrated memory controller, for which space was made where the L2 cache normally sits on the Palomino and the Thoroughbred. Apart from new features such as the integrated memory controller and the enlarged L2 cache (1 MB, 16-way associative), the rest of the features remain largely unchanged. This can be seen in our photos comparing it to the Thoroughbred core. As was previously the case, there are nine function units (3 ALU, 3 AGU, FADD, FMUL and FMISC - three integer units and three floating point units) and three x86 decoders - the tried and true design cherished by AMD. Almost untouched are the L1 caches for data and commands with as size of 64 kB each, although now an ECC circuit has been added.
Looking into the heart of the matter: a view of the CPU core without the L2 cache and memory controller. The next image explains why you should care.
A comparison of the CPU cores of the Hammer (left) and the old Athlon with the Thoroughbred core makes it seem as if almost all units are identical at first glance. You can see AMD only made small changes to the details of its architecture with the Hammer - apart from the memory controller and the L2 cache, of course.