Duron and Sempron: AMD's Celerons
CPU makers seem to like names that end in “on.” To compete with the Celeron and back up its Athlon, AMD released the Duron, later replaced by the Sempron. These two budget processors were generally slower than the Athlon and had less cache memory. AMD’s exclusive cache design enabled CPUs with an L2 cache that was smaller than the L1, since the latter was not mirrored in the L2 (unlike the inclusive architecture used by Intel). The Sempron is simply a re-named Athlon XP, with certain versions equipped with less cache memory (256 of 512 KB are disabled in the Thorton).
| Code name | Spitfire | Thorton |
| Date released | 2000 | 2004 |
| Architecture | 32-bits | 32-bits |
| Data bus | 32-bits | 32-bits |
| Address bus | 32-bits | 32-bits |
| Maximum memory | 4,096 MB | 4,096 MB |
| L1 cache | 64 KB + 64 KB | 64 KB + 64 KB |
| L2 cache | 64 KB (CPU frequency) | 256 KB (CPU frequency) |
| Clock frequency | 600-950 MHz | 1,500-2,000 MHz |
| FSB | 100 MHz (DDR) | 166 MHz (DDR) |
| FPU | built-in | built-in |
| SIMD | MMX, Enhanced 3DNow! | MMX, Enhanced 3DNow!, SSE |
| Fabrication process | 180 nm | 130 nm |
| Number of transistors | 25 million | 54.3 million |
| Power consumption | 27-41 W | 62 W |
| Voltage | 1.5–1.6 V | 1.6 V |
| Die surface area | 100 mm² | 100.99 mm² |
| Connector | Socket A | Socket A |
In addition to the Spitfire, AMD also released the Duron Morgan (based on the Athlon XP, with SSE support) and the Applebred (130 nm). The Sempron continued its career with the K8 Sempron 3400+, which is a 64-bit Sempron.
