Integrated Graphics Performance: It's all in the chips
Intel I865G - Extreme Graphics 2
The 3D graphics component of the i865G northbridge, alias 82865G - GMCH, is called "Extreme Graphics 2." It uses a tiling architecture very similar to that of Power VR's Kyro series, although Intel calls this technique "Zone Rendering" instead of tiling. Regardless of the choice of name, this architecture divides each frame into zones, or tiles, which are rendered one by one and then written to the frame-buffer. The driver sorts the geometry and polygon triangles by zone in the system memory, after which the chip processes them in that order. This lets the integrated caches work more efficiently, thereby freeing up memory bandwidth.
According to Intel, all Z-operations can be handled by the chip itself, making a dedicated Z-buffer and the associated read and write operations unnecessary. Whether or not Intel's chip employs a "hidden surface removal" technology similar to that of the Kyro is unclear, as the documentation doesn't cover this. On the other hand, Intel says that the chip does not render pixels that are not visible (overdraw = 1), pointing to a HSR solution.
Intel Zone Rendering 2
Intel calls its Zone Rendering a "unique" solution, which implies that it differs from the techniques employed in the Kyro chip. Perhaps this "uniqueness" refers to the ability to sort geometry and textures in the system memory, since the chip does not have its own memory interface. Power VR's Kyro, meanwhile, has to write its data to the card's frame buffer first. Unfortunately, Intel's white paper does not offer more detailed information on this point.
The tiler, or zone renderer, design precludes the use of a hardware T&L engine. Intel's i865G is a DirectX 7 generation part. It does not support pixel and vertex shader calculations. It does support DXTn and FXT1 texture compression, though. Thanks to its single-pass quad texture support, up to four texture-blending operations can be processed per cycle. However, Intel does not provide any more information on the pixel pipeline.
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