Intel 18A
Latest about Intel 18A

Intel demos running Panther Lake systems, touts performance and power efficiency improvements
By Paul Alcorn published
Intel demoed working Panther Lake silicon for laptops, its first chips based on its crucial 18A process node, here at Computex 2025 in Taipei, Taiwan.

Intel ARCade machine showcases a NUC Extreme with Arc A770 GPU
By Hassam Nasir published
Intel ARCade machines are often featured in major e-sports events, but who knows if a Battlemage edition appears at Computex?

Intel says foundry business won't break even until 14A in 2027
By Anton Shilov published
Intel expects its loss-making Foundry division to reach breakeven by 2027, driven by internal adoption of its 18A process, and contributions from packaging, and mature nodes.

UK extends deadline for Qualcomm to make offer for Alphawave
By Anton Shilov published
As Arm quits the race for Alphawave

Intel hedges its bet for High-NA EUV with the 14A process node
By Paul Alcorn published
Intel has not yet fully committed to using the new High-NA EUV chipmaking tool in production and has an alternative production flow of its 14A node that uses standard Low-NA EUV as a backup plan.

Intel details 14A performance and new 'Turbo Cells' that unlock maximum CPU and GPU frequency
By Paul Alcorn published
I. Am. Speed.

Intel Foundry Roadmap Update - New 18A-PT variant that enables 3D die stacking, 14A process node enablement
By Paul Alcorn last updated
Intel's new CEO Lip Bu-Tan took to the stage at the company's Intel Foundry Direct 2025 event here in San Jose, California to outline the company's progress on its foundry initiative.

Intel Cougar Cove (P), Darkmont (E) core architectures revealed in Panther Lake perfmon commit
By Hassam Nasir published
Intel has updated its perfmon platform to support Panther Lake, while disclosing its Performance (P) and Efficient (E) core architectures: Cougar Cove and Darkmont.

TSMC discloses N2 defect density — lower than N3 at the same stage of development
By Anton Shilov published
TSMC claims N2 defect density is lower than N3 defect density two quarters before mass production starts, reveals N2 HVM time frame.

Intel redefines AI strategy — Jaguar Shores to be rack-level design with focus on silicon photonics
By Anton Shilov published
Intel outlined its revamped AI strategy under new leadership that includes variety of workload-specific products, optical interconnects for rack-scale solutions, and revamped software stack.
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