Benchmark Marathon: 65 CPUs from 100 MHz to 3066 MHz

Intel Pentium 150 To 233 mmX: October 1996 To June 1997

New to the Pentium codenamed P55C was an increase in L1 cache to 32 kB and the introduction of the MMX instruction set. The L2 cache was still located on the board. The CPUs contained 4.5 million transistors. The Intel 430HX or 430TX were often the chipsets of choice, with the latter having a maximum RAM restriction of 64 MB (cacheable area).

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