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Chinese quartz approved for semiconductor equipment and DRAM manufacturing, breaking the US's stranglehold
By Anton Shilov Published
Pacific Quartz gets its high-purity quartz qualified for semiconductor equipment and DRAM manufacturing.

The ABF substrate data center roadmap — solving the supply crunch and material wall beneath every AI accelerator
By Etiido Uko Published
Premium Anjinomoto's secret sauce.

TSMC, Samsung, and Intel shore up support with ASML to deploy larger High-NA EUV photomasks
By Anton Shilov Published
Premium ASML, Intel, Samsung, and TSMC back development of 6×12-inch to build large processors using High-NA EUV lithography systems without stitching.

TSMC to start using High-NA EUV lithography in 2030
By Anton Shilov Published
TSMC discloses plans to use High-NA EUV lithography in 2030, 6×12-inch photomasks with new scanners in 2033.

Belgian-Chinese semiconductor researcher arrested over alleged GaN trade-secret theft
By Etiido Uko Published
Linked Chinese company was established months after the suspect joined BelGaN

Intel surpasses one million High-NA EUV wafers processed, outpaces the rest of the industry combined
By Anton Shilov Published
Intel is leading the semiconductor industry with High-NA fleet and process-maturity milestone as it reaches 1 million wafers processed using High-NA tools, moves forward with 6×12 photomask effort.

TSMC fab equipment demand nearly doubles in six months
By Anton Shilov Published
TSMC's equipment requirements have nearly doubled in just eight months as AI demand drives an unprecedented fab expansion, yet its 2026 CapEx budget has risen by only around 15%.

The current state of Hybrid Bonding in 2026
By Luke James Published
Premium Hybrid bonding, the copper-to-copper joining technique that replaces solder microbumps in 3D chip stacks, is in high-volume production on logic and freshly postponed on memory.

China's DUV technology 'at a similar stage to ASML in 2004,' analyst claims
By Anton Shilov Published
Despite rumors, there is no evidence that Chinese makers of lithography tools can produce immersion lithography scanners in quantity.

Samsung reveals a three-phase HBM roadmap that puts logic and compute inside memory — zHBM ultimately stacks DRAM directly on top of the processor
By Etiido Uko Published
Premium Samsung detailed a three-phase HBM roadmap at Hot Chips 2026 that progressively moves logic into the base die and ultimately stacks DRAM directly on the processor.
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