RISC V: The Open Standard Architecture
Latest about RISC V

By Sunny Grimm Published
U.S. lawmakers again review the risks of China's access to powerful chips through the RISC-V standard, an open-source ISA that wants to remain open to all.

By Anton Shilov Published
Allen Wu, former CEO of Arm China, founds RISC-V technology startup, set to rival Arm.

By Aaron Klotz Published
SiFive's selects Chinese silicon instead of Intel's spin

By Aaron Klotz Published
XSi has created a new RISC-V microprocessing chip architecture that combines a RISC-V CPU core with vector capabilities and GPU acceleration into a single chip.

By Zhiye Liu Published
Yingren (aka InnoGrit) has announced the YRS820, a high-end PCIe 5.0 controller for consumer SSDs based on the RISC-V architecture.

By Anton Shilov Published
Alibaba continues to flex its RISC-V muscle, expects to roll-out datacenter-grade RISC-V CPU this year.

By Anton Shilov Published
SiFive's optimistic outlook may point to new RISC-V licensing deal with Google.

By Christopher Harper Published
India launches a RISC-V powered Aries v3.0 development board for roughly the equivalent of $20 USD. It's powered by a 32-bit, 100 MHz CPU with 256KB of SRAM.
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