Samsung Foundry Tapes Out First 3nm Test Chip

Samsung Foundry and Synopsys have announced that Samsung has taped out its first test chip using its 3GAA (3 nm) fabrication technology that features gate all-around (GAA) transistors. The test chips was designed using Synopsys' Fusion Design Platform electronic design automation (EDA) tools. 

Samsung's 3GAA manufacturing process uses brand-new gate all-around (GAA) transistors that promise to enable lower leakage, higher performance, and increased transistor density when compared to the company's existing nodes. One of the benefits provided by GAA transistors is ability to tune their performance and power consumption using nano-sheet-width control.  

But to take advantage of Samsung's 3GAA technology one needs to use all-new EDA tools and IP, which is when Synopsys comes into play. The new software from Synopsys takes into account new complex placement methodologies, floorplan rules, routing rules and increased variability at new geometries. 

The first company to use the new node will likely be Samsung's own LSI division that designs SoCs for smartphones, PCs, televisions, and other products by Samsung. 

 

Anton Shilov
Contributing Writer

Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.