DDR3-1333 Speed and Latency Shootout

SPD Timing Comparison

Though we will find the lowest stable timings at increased voltage in our later "lowest stable latency" tests, a chart comparing all the rated timings should help determine which market each module set is really targeting.

Automatic Configuration Data (MHz: tCL-tRCD-tRP-tRAS)
Brand/Model/Part Number Detected SPD Timings Rated Settings SPD Extensions
Aeneon 667: 8-8-8-15 416: 5-5-5-15 DDR3-1333, None
X-Tune DDR3-1333 500: 6-6-6-18 CAS 8-8-8-15,
AXH760UD00-13G 667: 8-8-8-24 1.50 V
750: 9-9-9-27
G.Skill 667: 9-9-9-24 444: 6-6-6-16 DDR3-1333, None
PC3-10600 592: 8-8-8-22 CAS 9-9-9-24,
F3-10600CL9D-2 GBNQ 667: 9-9-9-24 1.50-1.65 Volts
Kingston 667: 8-8-8-24 416: 5-5-5-15 DDR3-1333, None
ValueRAM PC3-10600 500: 6-6-6-18 CAS 8-8-8-24,
KVR1333D3N8/1G 583: 7-7-7-21 1.50 Volts
667: 8-8-8-24
Kingston 533: 7-7-7-20 457: 6-6-6-18 DDR3-1333, None
HyperX PC3-11000 533: 7-7-7-20 CAS 7-7-7-20,
KHX11000D3LLK2/2G 609: 8-8-8-23 1.70 Volts
Mushkin Enhanced 667: 9-9-9-24 444: 6-6-6-16 DDR3-1333, None
EM3-10666 518: 7-7-7-19 CAS 9-9-9-24,
996583 667: 9-9-9-24 1.50 Volts
OCZ Technology 667: 7-7-7-20 476: 5-5-5-15 DDR3-1333, None
PC3-10666 Platinum Edition 571: 6-6-6-18 CAS 7-7-7-20,
OCZ3P13332GK 667: 7-7-7-20 1.80 Volts
761: 8-8-8-23
OCZ Technology 533: 6-5-5-20 533: 6-5-5-20 DDR3-1333, None
PC3-10666 ReaperX 622: 7-6-6-24 CAS 6-5-5-18,
OCZ3RPX1333EB2GK 711: 8-7-7-27 1.85 Volts
Patriot Extreme Performance 533: 7-7-7-20 457: 6-6-6-18 DDR3-1333, None
PC3-10666 Low Latency Kit 533: 7-7-7-20 CAS 7-7-7-20,
PDC34G1333LLK 1.70 Volts
Super Talent 533: 7-7-7-20 533: 7-7-7-20 DDR3-1333, XMP-1600
PC3-10600 CL8 609: 8-8-8-23 CAS 8-8-8-18, CL 8-8-8-28
W1333UX2G8 1.80 Volts 2.00 V
Wintec Industries 533: 8-8-8-20 400: 6-6-6-15 DDR3-1333, None
AMPX PC3-10600 533: 8-8-8-20 CAS 9-9-9-24,
3AHX1333C9-2048K 1.50 Volts

Aeneon and OCZ both provide SPD values in excess of their rated speed, while Super Talent uses Intel XMP automatic overclocking capabilities to go even higher. Kingston and PDP Patriot instead target the low-latency crowd, but OCZ appears to shoot for both markets with both of its products.

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  • dv8silencer
    I have a question: on your page 3 where you discuss the memory myth you do some calculations:


    "Because cycle time is the inverse of clock speed (1/2 of DDR data rates), the DDR-333 reference clock cycled every six nanoseconds, DDR2-667 every three nanoseconds and DDR3-1333 every 1.5 nanoseconds. Latency is measured in clock cycles, and two 6ns cycles occur in the same time as four 3ns cycles or eight 1.5ns cycles. If you still have your doubts, do the math!"

    Based off of the cycle-based latencies of the DDR-333 (CAS 2), DDR2-667 (CAS 4), and DDR3-1333 (CAS8), and their frequences, you come to the conclusion that each of the memory types will retrieve memory in the same amount of time. The higher CAS's are offset by the frequences of the higher technologies so that even though the DDR2 and DDR3 take more cycles, they also go through more cycles per unit time than DDR. How is it then, that DDR2 and DDR3 technologies are "better" and provide more bandwidth if they provide data in the same amount of time? I do not know much about the technical details of how RAM works, and I have always had this question in mind.
    Thanks
  • Anonymous
    Latency = How fast you can get to the "goodies"
    Bandwidth = Rate at which you can get the "goodies"
  • Anonymous
    So, I have OCZ memory I can run stable at
    7-7-6-24-2t at 1333Mhz or
    9-9-9-24-2t at 1600Mhz
    This is FSB at 1600Mhz unlinked. Is there a method to calculate the best setting without running hours of benchmarks?
  • Anonymous
    Sorry dude but you are underestimating the ReapearX modules,
    however hard I want to see what temperatures were other modules at
    a voltage of ~ 2.1v, does not mean that the platinum series is not performant but I saw a ReapearX which tended easy to 1.9v(EVP)940Mhz, that means nearly a DDR 1900, which is something, but in chapter of stability/temperature in hours of functioning, ReapearX beats them all.
  • Anonymous
    All SDRAM (including DDR variants) works more or less the same, they are divided in banks, banks are divided in rows, and rows contain the data (as columns).
    First you issue a command to open a row (this is your latency), then in a row you can access any data you want at the rate of 1 datum per cycle with latency depending on pipelining.

    So for instance if you want to read 1 datum at address 0 it will take your CAS lat + 1 cycle.

    So for instance if you want to read 8 datums at address 0 it will take your CAS lat + 8 cycle.

    Since CPUs like to fill their cache lines with the next data that will probably be accessed they always read more than what you wanted anyway, so the extra throughput provided by higher clock speed helps.

    But if the CPU stalls waiting for RAM it is the latency that matters.
  • Anonymous
    what is on pc3-10600s "s" ?