Latest about TSMC Symposium
TSMC mulls massive 1,000W-class multi-chiplet processors with 40X the performance of standard models
TSMC is prepping a 9.5-reticle, 7,885 mm² multi-chiplet packages on 120\00d7150 mm substrates with integrated power management for future AI and HPC processors.
TSMC's 3nm update: N3P in production, N3X on track
TSMC has begun production of chips on its performance-enhanced N3P node, plans to follow with the high-frequency N3X variant.
TSMC unveils 1.4nm technology: 2nd Gen GAA transistors, full node advantages, coming in 2028
TSMC unveils its A14 process technology featuring 2nd generation GAA nanosheet transistors and NanoFlex Pro DTCO with production slated for 2028.
Tesla's wafer-sized Dojo processor is in production
Additional details about Tesla's Dojo SoW emerged at TSMC's North American Technology Symposium.
TSMC to build massive chips twice the size of today's largest — chips will use thousands of watts of power
TSMC preps 8x reticle size or larger interposers for gargantuan AI and HPC SiPs.
TSMC to go 3D with wafer-sized processors — new tech allows 3D stacking for the world's largest chips
TSMC plans to integrate HBM4 with system-on-wafer designs in 2027.
TSMC readies lower-cost 4nm manufacturing tech: Up to 8.5% cheaper
TSMC rearchitects N4P process technology to make it cheaper.
