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Intel demonstrates Itanium multi-core processor

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2:24 PM - September 7, 2004 by Wolfgang Gruener

San Francisco (CA) - As announced last week, Intel today showed its multi-core processor approach in the opening day keynote of IDF Fall. President and COO Paul Otellini demonstrated the technology in the shape of the next-generation Itanium processor, code-named Montecito.

In front of a crowd of a about 5000 visitors, Otellini noted that the technology will be introduced in a whole "product lineup", not limited to the server and workstation products Itanium and Xeon. The Montecito processor on the stage carried 1.72 billion transistors and 2x12 MByte of L3 cache for a total of 26.5 MByte of cache memory, according to Otellini. The chip will feature parallelism capabilities on a instruction and thread level. Compared to the current 130nm Itanium 2 chip, Montecito will post a performance increase of about 25 percent in enterprise environments, Intel said.

Intel previously said that it will extensively discuss its multi-core strategy at IDF this week. The company will also give a first glimpse on multi-core processor for the mobile and desktop segment. In contrast to AMD which was first to demonstrate a dual-core processor early last week, Intel avoids to call its new chips dual-core, but rather "multi-core" or "many-core", according to technology chief Pat Gelsinger.

Intel also is already ramping up its marketing and communications momentum, touting that it has technology leadership in this technology and being early to announcing its strategy "three years ago". A closer look however reveals that AMD in fact was a bit quicker again, mentioning such a development program already back in 1999. Asked, if Intel is falling behind in developing new technologies, Otellini answered: "This is not a race".

While the question that has driven the multi-core innovation is rather unclear, Intel appears to once again emerge as the stronger force to stress the importance and future impact of the technology.

Parallelism, one of the dominating topics of this year's IDF, was explained by Otellini with several examples. One of the most visible once described a person who receives a phone call on a cell phone, stops walking across a street in order to talk and then is run over by a truck. While Intel is late to shift its marketing model away from pushing Gigahertz, this year's IDF showed more than ever that Intel will build on stressing that there is more to processor performance than just clock speed.

Other highlights of the keynote included DTCP over IP for streaming digital video as well as a demonstration of Intel's virtualization platform code-named Vanderpool. Instead of running four separate computers in a demo, the company's software allows to manage four virtual systems on a single physical system. Otellini said that Intel will support the technology with the arrival of Microsoft's next-generation Windows OS, code-named Longhorn, in 2006.

Intel also showed for the first time its 802.16 WiMax chip, called "Pro Wireless 5116 Broadband Interface" and, of course, Intel's traditional performance-related announcement was not absent at this year's opening keynote. The company Intel announced a relationship with NASA, stating that the space agency will create a cluster with 10,240 Itanium II CPUs. NASA hopes that it can reach a sustained performance of about 60 TFlops or about 50 percent more than the current fastest supercomputer, the Earth Simulator built by NEC.

Source : Tom's Hardware US

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