Intel Xeon E7 V2 Family Will Pack 15 Cores

The E5-2600/4600 V2 and E7-8800V2 CPUs have been detailed. The E5-2600 V2 family of CPUs will feature up to 12 cores with Hyperthreading, resulting in 24 threads. They will also carry 30 MB of L3 cache and have quad-channel DDR3-1866 memory support, per socket. They can also be run in dual-socket configurations. The chips that carry 12 cores and are clocked higher would have TDPs between 115 W and 130 W, while the lower clocked 10-core versions would have a TDP of only 70 W. All the chips will comfortably rest in the LGA 2011 socket on a C600 series chipset.

Beyond the E4-2600 chips, there are also the E5-4600 V2 chips. These chips will be similar to the E5-2600 series CPUs but instead have support for four-socket configurations. Clock speeds would swing around the 3 GHz mark.

Intel is also developing a new Ivy Bridge-EX family of CPUs to replace the Westmere EX series. The new Xeon E7-8800/4800/2800 V2 series of chips would comprise part of the high-end enterprise "Brickland" platform. The E7-8800 V2 chips would work in configurations that feature up to eight sockets and will feature 15 cores per CPU, along with Hyperthreading, resulting in 30 threads per socket. This platform would also be based on the C600 series chipset but would support more memory configurations. Beyond the expected ECC DDR3-1600 memory, the CPUs would also support DDR4-2133/2400/3200 memory.

The E5-2600 V2 chips are slated for a Q3 2013 release, while the E5-4600 chips are scheduled for a Q1 2014 release. The Xeon E7 family of enterprise-class CPUs are slated for a Q1 2014 release.

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Niels Broekhuijsen

Niels Broekhuijsen is a Contributing Writer for Tom's Hardware US. He reviews cases, water cooling and pc builds.

  • burnley14
    Wow, so 8 sockets at 15 cores/30 threads per socket. That's 240 threads per setup. That's crazy.
    Reply
  • Rabin Pro
    i wonder what that would to to 10gb winrar compression time :P
    Reply
  • InvalidError
    10648406 said:
    Wow, so 8 sockets at 15 cores/30 threads per socket. That's 240 threads per setup. That's crazy.
    Xeon Phi is pretty crazy too with up to 60 cores per chip and four threads each, that's 240 threads per chip/card.

    I bet next year's top-500 is going to have a few E7v2 clusters packed with quad Phi... 1200 total threads per server!
    Reply
  • sundragon
    MOAAR COAAARRRS... On 22nm, this beast should pack a wallop - I love how this will trickle down to desktops, laptops, and mobile :D
    Reply
  • janetonly42
    Looks like the next gen of Mac Pro is going to rock.
    Reply
  • jackbling
    dat vmware host
    Reply
  • dalethepcman
    10648586 said:
    10648406 said:
    Wow, so 8 sockets at 15 cores/30 threads per socket. That's 240 threads per setup. That's crazy.
    Xeon Phi is pretty crazy too with up to 60 cores per chip and four threads each, that's 240 threads per chip/card.

    I bet next year's top-500 is going to have a few E7v2 clusters packed with quad Phi... 1200 total threads per server!

    Xeon PHI has it's benefits, but due to its low frequency (1ghz) it only shines in massively parallel x86 legacy applications. I see the E7v2 series chips being a much better all around solution as long as their frequency can stay in the 2ghz + area.
    Reply
  • andy5174
    Consumers will need to cut an arm and a leg to buy one!
    Reply
  • InvalidError
    10648954 said:
    Xeon PHI has it's benefits, but due to its low frequency (1ghz) it only shines in massively parallel x86 legacy applications. I see the E7v2 series chips being a much better all around solution as long as their frequency can stay in the 2ghz + area.
    I think you got that backward.

    The Phi shines in massively parallel supercomputing applications and typical "legacy" x86 code is nowhere near well-threaded enough to make remotely effective use of such massive parallelism. It delivers nearly twice the throughput per chip than a 3GHz E7v2 would, likely for a fraction of the cost at the expense of programming effort.

    The E7v2 would shine in moderately threaded (more "legacy-like") x86 applications that cannot efficiently leverage Phi's massive parallelism and benefit more from E7's higher clock rate and IPC.

    For HPC applications, both are needed since supercomputing applications often have a mix of both brute-force calculations that are a perfect fit for Phi and more linear computations that would benefit more from the E7v2, hence my bet that we will see systems combining both in the top-500 list next year.
    Reply
  • spazoid
    Any word on compatability with current S2011 serverboards? BIOS update enough?
    Reply