MIPS Introduces Code Compression Chips
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Fitting 32-bit code into 16-bit space.
We often hear lots about the latest desktop and notebook processors, but rarely do we go into detail about the chips that power the smaller devices in our cars, set top boxes, routers, etc.
Today MIPS Technologies introduced a new core family comprised of the MIPS32 M14K and M14Kc cores, which are the first MIPS32-compatible cores that also execute the new microMIPS instruction set architecture (ISA), enabling performance of 1.5 DMIPS/MHz with an advanced level of code compression.
The new microMIPS ISA maintains 98 percent of MIPS32 performance while reducing code size by 35 percent, or in other words, it gives 32-bit performance with near 16-bit code sizes. This translates to significant silicon cost savings, which could be passed onto the consumer.
"Growing amounts of signal processing and higher speed connectivity are driving up the performance requirements in MCUs and many cost-sensitive embedded applications, while still requiring a very small silicon footprint," said Art Swift, vice president of marketing at MIPS Technologies. "We’re enabling our customers to develop high-performance devices in smaller form factors to significantly decrease development costs. We’re pleased to enhance and expand our offering for MCU and system designers with these groundbreaking new cores."
Besides its use in microcontrollers, the M14K micro-architecture supports a Linux and Java engine, making it viable for implementation inside an Android platform with its full cache controller and translation lookaside buffer (TLB) memory management unit (MMU).
System designers will be able to integrate the new M14K and M14Kc cores in the first quarter of 2010.
Source : Tom's Hardware US
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idk i always find the super small processors interesting....
But can it run CRYSIS!?
Ugh...enough with the Crysis comparison...
Now my router can have even less memory. I actually hope it goes the other way and allows for more features.
Now my router can have even less memory. I actually hope it goes the other way and allows for more features.
Exactly. We understand companies can manufacture electronics for less $$ but I want to know if this is going to compromise performance on anything.
"The new microMIPS ISA maintains 98 percent of MIPS32 performance while reducing code size by 35 percent"
I'm guessing the compromise is around 2%
Exactly. We understand companies can manufacture electronics for less $$ but I want to know if this is going to compromise performance on anything.
"The new microMIPS ISA maintains 98 percent of MIPS32 performance while reducing code size by 35 percent"
It will bring only a very tiny drop in current performance but that's not what this is about. The fact it can deal with 32-bit logic in a 16-bit space means less die-space used. This results in lower heat emissions and a lower TDP. Perhaps the scalability is similar and the ability to get similar results from 64-bit computations on a 32-bit size yielding the same output frequency at ~98% efficiency... going back to the heat and TDP, it could allow for a vast increase in clockspeeds?
Just a thought.
Um, 35% is a long way from 50%, more like 1/3 reduction instead of 1/2. 32bit to 22 bit, not 16. Besides, ROM is cheap and not power hungry or hot. This is non-news.
so MIPS is the name of the company and unit AND architecture?
"Introducing the new MIPS MIPS processor operating at 1.5GMIPS/s... MIPS."