AMD Plans: New Processor Socket And DDR2 For 2006
With great stealth - and absolute secrecy - AMD is currently modernizing its product range to offer more and more processors manufactured using the cutting-edge and energy-saving 90 nm process. Models with 512 kB L2 cache are based on the Venice processor core; the core used with the 1 MB L2 cache is called San Diego. For the first time, both support Intel's SSE3 streaming extensions. The first benchmarks in the lab give the new chips a slight performance edge even without using SSE3. Apart from SSE3, the big plus is lower average heat loss.
The Athlon 64 FX should be boosted to 2.8 GHz by mid-year. The model based on the San Diego processor core is likely to be clocked at 2.8 GHz and priced in the usual wide band around $800.
AMD has also planned the introduction of two dual core processors going by the name of Athlon 64 X2 by the middle of the year - models will have 512 kB and 1 MB L2 cache per core at clock speeds similar to those of single core processors. Aside from this news, the beginning of 2006 promises to produce a real innovation when the DDR400 controller on the Athlon 64 is replaced by a DDR2 model. We assume that AMD will also support DDR2-800 at that time, because the slower latency speeds inherent in DDR2 memory means it has to be clocked faster to enable better results compared to DDR400. AMD is also aiming to offer a virtualization technology called Pacifica, which resembles Intel's Vanderpool approach. The dual core goes by the codename Windsor, while the new single core model is labeled Orleans.
For its Athlon 64 CPUs with DDR2 memory, AMD case needs a new processor socket, since the new memory modules have 240 pins, compared to the 184 of conventional DDR. This socket, called M2, will handle low-cost, mainstream and performance processors, a practice that Intel already employs with its Socket 775.
Unfortunately, waste-heat levels will also rise on the AMD processors, up to 104 watts for single cores and 110 or 125 watts for dual-core processors (512 kB and 1 MB L2 cache per core respectively). The new socket , we believe, is due to have no more pins than the current one, even if rumors on the Net speak of 1207 contacts. In fact, it could be the familiar Socket 940 with a new pin configuration. AMD itself claims that the integration of the dual-channel DDR2 controller into one socket with 940 pins is technically possible. A slew of ground lines has already been provided, which could be put to other uses.