Intel’s Xeon 7500-Series CPUs Target Enterprise Computing

Intel Versus AMD

Intel certainly has numbers on its side: more than 90 percent of the server market is x86, and Intel owns more than 80 percent of that pie. AMD had gone from zero percent marketshare in 2003, when it launched the Opteron, to 20 percent in record time, only to fritter that away by delaying the launch of the quad-core Barcelona processor in 2007.

AMD has gotten its mojo back with a series of releases that were on time (or ahead of schedule, in some cases) and delivered decent performance at a lower price than Intel. Slowly, AMD regained its good standing with the major server OEMs, and with each subsequent Opteron launch, has more OEMs.

AMD's latest processor is Magny-Cours, an eight- and 12-core Opteron. The company took the six-core "Istanbul"-era Opteron and connected two of them with a high-speed HyperTransport interconnect. The eight-core design is simply two six-core Opterons with two cores disabled on each.

Those in the technical know will say AMD is being hypocritical by doing this, since that was Intel's solution for its first quad-core Xeons. It took two dual-core processors and "glued" them together on the same die. But Intel's solution was less elegant.

For starters, if a core on one CPU wanted to communicate with the other core, the data would have to go out through the front side bus and back in to the CPU. This was an inefficient design, although Intel still got some decent performance out of those kludgey designs (Intel didn't hesitate to point this out, either). With Magny-Cours, a point-to-point HyperTransport interconnect between the two CPUs is many times faster than the old Xeon solution.Magny-Cours does not use Hyper-Threading (a proprietary Intel technology), but does have 8/12 cores versus the four/six in the Xeon 5600. I bring up the 5600 because AMD has never positioned M-C as a competitor to the Xeon 7500-series; it sees the Intel Xeon 5600 processor family as its primary competitor. Now, the technical argument of two cores vs. one core with two threads is an article in and of itself. Hyper-Threading does maximize the execution of code in one core, getting two threads or processes done with one core. But in the end, AMD will argue cores trump multithreading, and the benchmarks will prove or disprove this.

The 5600 is a two-socket mid-level processor good for the majority of server tasks, whereas the 7500/6500 will be for the mission-critical and high performance markets. That's about the one area where Intel and AMD will meet is in HPC.

Twice per year, the Top500 supercomputer list, a ranking of the fastest known supercomputers in the world, is released and every company involved issues press releases for bragging rights. Both Intel and AMD are targeting HPC with their respective chips. You might see a few on the list that comes out this June, but you will definitely see a bunch of 7500- and Magny-Cours-powered servers on the November list.

Magny-Cours is also aiming to lower the economics of the four-socket market. Dual-processor (2P) servers are fairly economical, but when you go to a quad-processor (4P) server, the price goes up by a factor of four or more. AMD refers to this as the "4P tax" and its goal is to bring the cost of a 4P server down to about double that of a 2P, perhaps even less.

While AMD would love to compete against the Xeon 7500, more likely it will compete with the 5600 in the mid- to upper-mid range of servers, and do so quite adequately at a competitive price.

  • surda
    even though i dont read much about server processors but this just sounds super fast, i like how it has alot of error stages checking so that it stays 24/7 without crashing, but do they really need all that speed for servers? i just gotta say hardware technology is moving very fast these days.

    nice article btw thank you.
    Reply
  • anamaniac
    These chips are absolute beasts! They do run at low frequencies however. (But would you want 130W chips in a 4P/8P box?)
    4 memory channels, 16 DIMMs per CPU, damn. I imagine you'd spend more on the 16GB DDR3 DIMMs than you would the processors though.
    Also nice to hear that these scale well in 4P/8P boxes.

    But I must ask, why are the 7500 chips in 45nm? Is the 32nm process still too immature to make a 2 billion transistor chip with any decent level of success?

    Assuming a 8P box, all CPU's clocked to 3.5GHz (~120GFlop per CPU, ~1TFlops total), you could run a few games purely in software mode and still get good performance. Damn.
    Reply
  • "In the course of one week, two separate events signaled what may be the end of Intel's grand experiment with RISC architecture. Intel released the Xeon 7500-series processor family, containing many features found in the Itanium, a RISC-based design developed in partnership with Hewlett-Packard, and Microsoft ended its support of Itanium."

    When did Itanium change from being a VLIW architecture to being a RISC architecture?... It was designed to overcome some RISC architecture limitations of the day. XScale was Intel's big RISC mistake...
    Reply
  • RazberyBandit
    I think it's just poor wording. Both portions of that sentence refer to the Xeon-7500. Try it this way:

    "In the course of one week, two separate events signaled what may be the end of Intel's grand experiment with RISC architecture. Intel released the Xeon 7500-series processor family, a RISC-based design developed in partnership with Hewlett-Packard containing many features found in the Itanium, and Microsoft ended its support of Itanium."

    There, all better!
    Reply
  • How necessary is it to have the error correction circuitry? If it's that important and the normal desktop and server architecture doesn't have it then are we not all accumulating errors in our data and code? With what frequency does this happen in the real world - and is the machine check architecture actually important, or just a bullet point for a sales brochure?
    Reply
  • gglawits
    AMD's Magny-Cours is the better value proposition.
    Compare the AMD 6128 (8 cores, 2.0 GHz, $266 list price) against the Xeon X7550 (8 cores, 2.0 GHz, $2729 list price) and you'll see what I mean. The XEON cost more than 10 times as much! Sure it's faster, but not 10 times faster. Not even 2 times faster.
    Reply
  • cjl
    gglawitsAMD's Magny-Cours is the better value proposition.Compare the AMD 6128 (8 cores, 2.0 GHz, $266 list price) against the Xeon X7550 (8 cores, 2.0 GHz, $2729 list price) and you'll see what I mean. The XEON cost more than 10 times as much! Sure it's faster, but not 10 times faster. Not even 2 times faster.You clearly didn't understand a word of this article.
    Reply
  • KlamathBFG
    Also consider the applications that can have their life extended with a new scaled up limit and compare that to the cost of re-engineering those applications and suddenly $2729 a processor sounds cheap $27,900 or in some cases $272,900 would still be cheap.
    Reply
  • idisarmu
    gglawitsAMD's Magny-Cours is the better value proposition.Compare the AMD 6128 (8 cores, 2.0 GHz, $266 list price) against the Xeon X7550 (8 cores, 2.0 GHz, $2729 list price) and you'll see what I mean. The XEON cost more than 10 times as much! Sure it's faster, but not 10 times faster. Not even 2 times faster.
    You sir, are an idiot. RAM is MUCH more expensive than these CPUs. Even 16gb of desktop DDR3 memory costs about $800. Now these mobos generally have more than 4 dimms per cpu- more like 8, so $1600 for RAM makes a $266 CPU seem really really cheap. Now server memory is always more expensive, so I think it would make perfect sense to spend $2000 more in order to have a system with fewer bottlenecks.
    Reply
  • ta152h
    Why comment on the Itanium when you don't know what it is? This doesn't signal the writing on the wall, only 6% of Itanium buyers were using Windows.

    It still has reliability features far exceeding the Nehalem-EX, and they are still greatly supported by the largest computer maker in the world, which, by the way, also was the original designer.

    It's not going anywhere.
    Reply