There are two major items for consideration when you think of the power consumption of conventional hard drives. The first item is the power requirement of the mechanical parts: this includes the spindle motor, which is used to drive the physical platters, but also the actuator, which positions the read/write heads. More power is required to reach faster spindle speeds, and power requirements also depend on the diameter of the platters, the number of platters, and on the bearings used.

More power is also required to reach short access times, because the actuator may need to accelerate and decelerate quickly in order to move the heads from one surface location to the next. Again, the number of platters has an influence on actuator power requirements, as one actuator arm is needed to position every two heads (one on each side of each platter).

Performance features such as Native Command Queuing (NCQ) may contribute to saving power under load. NCQ lines up all incoming commands, analyzes them, and reorders them for execution in a way that minimizes head movement. However, NCQ is only really interesting in server-type environments.

The second major area of power consumption in a hard drive is the circuit board, which carries the controller, cache memory and interface logic. Increasing levels of integration have contributed to making the hard drive core logic more and more efficient. However, it still cannot be left out of the power equation.

Obviously, power savings can be achieved on the physical level, by reducing the spindle speed or by slowing down acceleration and break performance for the actuator. Optimizing the bearings is difficult, as most hard drives are already based on so-called fluid dynamic bearings (FDB). Deploying new, lighter materials can also help to reduce power consumption. However, robustness and reliability is an issue that must not be underestimated, and it’s hard to reduce parameters such as the thickness of a platter, due to the impact on other areas, such as ensuring smooth rotation. On the PCB side, it’s certainly possible to deploy power-saving mechanisms just like on other silicon components. Logic that isn’t being used, such as the cache memory, could be temporarily disabled.