Samsung today announced that it has begun the mass production of DDR3 RAM based on the 20nm process thanks to a modified approach to scaling. Scaling with DRAM memory is more difficult than scaling with NAND. In NAND flash memory, a cell only needs a transistor, but with DRAM, each cell requires a capacitor and a transistor that are linked to each other. Samsung utilized a modified double patterning and atomic layer deposition to continue scaling for more advanced DRAM.
While it's been useful for Samsung's mass production of 20nm 4G DDR3 DRAM, this modified double patterning technology isn't just notable for its enabling of 20nm DDR3 production with current photolithography equipment. It's also established the core technology required for the next generation of 10nm-class DRAM production.
"Samsung's new energy-efficient 20-nanometer DDR3 DRAM will rapidly expand its market base throughout the IT industry including the PC and mobile markets, quickly moving to mainstream status," said Samsung VP Young-Hyun Jun. "Samsung will continue to deliver next-generation DRAM and green memory solutions ahead of the competition, while contributing to the growth of the global IT market in close cooperation with our major customers."
With this new technology comes improved manufacturing productivity. Samsung is claiming it's over 30 percent higher than that of the preceding 25 nanometer DDR3, and more than twice that of 30nm-class DDR3. These new 20nm 4Gb DDR3-based modules can also save up to 25 percent of the energy consumed by equivalent modules based on the previous 25 nanometer process technology.
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