Pentium Pro: The First To Handle Over 4 GB Of Memory
The Pentium Pro, released in 1995, was the first x86 CPU able to manage more than 4 GB of RAM using Physical Address Extension (PAE), 36-bit address size, and thus 64 GB. An interesting point is that this processor was also the first P6 (the architecture the Core 2 processors are loosely derived from) and also the first x86 to include a Level 2 cache on the processor instead of on the motherboard. In fact, between 256 KB and 1 MB of cache were placed next to the CPU, on the same socket, making the L2 cache on-package as opposed to on-chip, clocked at the same frequency as the CPU.
This processor also had a bit of a performance issue. It ran great in 32-bit applications, but was much slower with software still written in 16 bits (like Windows 95). The cause was simple: access to 16-bit registers caused problems with management of the (32-bit) registers, which canceled out the advantages of the Pentium Pro’s out-of-order architecture.
| Code name | P6 |
| Date released | 1995 |
| Architecture | 32 bits |
| Data bus | 64 bits |
| Address bus | 36 bits |
| Maximum memory | 64 GB |
| L1 cache | 8 KB + 8 KB |
| L2 cache | external, 256-1024 KB (CPU frequency) |
| Clock frequency | 150-200 MHz |
| FSB | 60-66 MHz |
| FPU | built-in |
| SIMD | N/A |
| Fabrication process | 600-350 nm |
| Number of transistors | 5,500,000 + cache |
| Power consumption | 29-47 W |
| Voltage | 3.3 V |
| Die surface area | 306-196 mm² + cache |
| Connector | Socket 8 |
The cache measured 202 mm² (256 KB at 500 nm), 242 mm² (512 KB at 350 nm), or 484 mm² (1 MB at 350 nm). The number of transistors in the cache was 15.5 million (256 KB), 31 million (512 KB), or 62 million (1 MB).
