At this year's Flash Memory Summit, LSI Corporation demonstrated a number of SandForce flash controller innovations, specifically the company's new SHIELD ECC technology.
Speaking at this year's Flash Memory Summit held at the Santa Clara Convention Center, LSI Senior Vice President and CTO Gregg Huff and a number of other experts showcased the company's latest SandForce flash controller technologies that aim to "highlight next-generation flash storage trends, challenges and solutions."
The technologies demonstrated included compatibility with Toshiba's 2nd generation 19 nm NAND memory (A19nm) and DuraWrite Virtual Capacity (DVC) that "extends the available storage capacity for typical data beyond the physical capacity of the underlying flash memory" by converting "free space" used for additional over-provisioning to additional, user accessible storage space.
Accompanying these items was LSI's new SHIELD error code correction (ECC) technology that aims to deliver "enterprise-class SSD endurance and data integrity even when using less expensive flash memory that typically has higher error rates." The technology essentially combines hard-decision, soft-decision and digital signal processing (DSP) with low-density parity-check (LDPC) code to create a comprehensive ECC solution that offers the following:
- Adaptive code rate: dynamically balances performance and reliability over the life of the SSD
- Smart handling of transient noise: reduces overall LDPC latency for improved ECC efficiency
- Multi-level ECC schema: judiciously applies stronger levels of ECC to minimize latency while maintaining optimal flash performance
“While the value proposition of NAND flash memory grows and is driving the adoption of flash-based storage solutions, the tradeoff is that today’s smaller fabrication geometries come with lower reliability and a shorter lifespan,” said Huibert Verhoeven, vice president and general manager, Flash Components Division, LSI Corporation.
“LSI SHIELD technology helps solve these challenges with advanced error correction that is optimized for SSDs and transforms the latest NAND flash memory into a more robust storage solution.”
Further information on the event and the aforementioned technologies are available at the source linked above.