Intel To Reveal Nehalem Clocking Architecture Details


Intel will present a paper on June 19 discussing the clocking architecture details of its next-generation Nehalem micro-architecture, scheduled for a release in Q4 of this year. According to the company, Nehalem will include configurable clocking, fastlock low-skew PLLs, high reference clock frequencies, analog supply tracking system, adaptive frequency clocking, a low jitter QuickPath interconnect and integrated memory controller clock generation, as well as jitter-attenuating DLLs.

QuickPath will support of 25 GB/s and 32 GB/s, depending on the processor model. Intel said that the processor core, the memory system, and IO feature decoupled frequency and voltages and the chip frequency is capable of adapting to the power supply voltage and droops. Especially noteworthy is that Nehalem can switch into different power states much faster than Core: Intel claims that the PLL lock time has been accelerated by 56% in Nehalem.