Intel's new space-grade Starfire chip is a Panther Lake SoC that puts an 18A CPU into orbit — chip designed for the US government leverages Intel 3 for the GPU
The two-SKU part tops out at 75 TOPS.
Intel has unveiled Starfire, a space-grade system-on-chip designed for the U.S. government that pairs eight CPU cores and a three-tile NPU built on its Intel 18A node with an Intel 3 graphics tile, all in one Foveros package. Intel published the Starfire sell sheet, listing two versions that draw 10 W and 35 W and reach up to 45 and 75 TOPS, respectively, rated to run between -55 and 125 Celsius.
Both SKUs share the same layout of four Intel 18A P-cores, four low-power efficiency cores, a three-tile NPU also on 18A, and a four-core Xe GPU with 64 execution units built on Intel 3. The Low Power part runs its P-cores at 1.0 GHz, efficiency cores at 850 MHz, and the GPU between 800 MHz and 1.0 GHz. The Performance part clocks the P-cores to 3.1 GHz, efficiency cores to 2.1 GHz, and the GPU to 2.0 GHz. Both carry 12 PCIe Gen4 lanes, support LPDDR5 or DDR5, and are rated for a 10-plus year lifetime.
Intel builds the CPU and NPU on 18A and the GPU on the older Intel 3, the same node division it used for Clearwater Forest, the 288-core Xeon that stacks 18A compute tiles on Intel 3 base tiles. Smaller transistors hold less charge per stored bit, which makes leading-edge silicon more prone to radiation-induced bit flips, so committing 18A to orbit leans on RibbonFET and design-level hardening rather than a mature, inherently more tolerant node.
The market Starfire is targeting has run on BAE Systems' RAD750 for two decades. That radiation-hardened PowerPC part clocks 110 to 200 MHz, carries 10.4 million transistors, and is built on 150nm or 250nm lithography, per public specifications, and it flies on the Mars rovers, Kepler, and Fermi, among more than 150 spacecraft. BAE's multi-core RAD5545 and the Microchip-built processor NASA is developing to reach 100 times the throughput of current spaceflight chips are the more recent step up. Starfire's up to 75 TOPS and dedicated NPU put it in a different bracket, built for on-orbit AI inference rather than telemetry and control.
Intel lists the radiation data, covering total ionizing dose, single-event latch-up, and single-event effects, as characterization in process, so the part isn't radiation-qualified yet, and it notes the specs are subject to change. Intel Government Technologies is handling Starfire, with samples in Q3 2026 and a pitch of market-competitive pricing and domestic manufacturing. Intel Foundry is the only U.S.-based maker of leading-edge logic, holds Trusted Foundry status, and has tied its 18A and packaging roadmap to Pentagon programs including RAMP-C and SHIP, though 18A yields aren't expected to reach industry-standard levels until 2027.
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Luke James is a freelance writer and journalist. Although his background is in legal, he has a personal interest in all things tech, especially hardware and microelectronics, and anything regulatory.
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usertests Reply
The rate of satellites being launched has increased dramatically. The 10W variant may be suitable for CubeSats. Some would be used in development kits back on Earth to test software that would run on the space-bound chips.JRStern said:What quantity is needed, dozens per year?
So, hundreds at least. -
Gururu I'll bet the quality control standards at least are going to price these in the six-figure range.Reply -
EzzyB Reply
I'll bet the quality control standards at least are going to price these in the six-figure range.
Maybe so. The last time I heard of these type chips (those used on the ISS, etc), and it was only a few years ago, they were still using a 200nm process!
So huge leap there, 200nm was around the turn of the century. I'm wondering if there weren't some NASA contracts and/or incentives involved as there was probably a LOT of R&D etc that went into this. The title, at least suggest that anyway.
The only problem I see is that it uses DDR5. I'm not sure that even the US Government can afford that right now. :ROFLMAO: -
qxp Reply
One advantage of 200nm is that the transistors are physically bigger and can withstand more energy. 18A seems too tiny for anything like that, and so radiation resistance has to be done through circuit design. Would be interesting to see how they do that.EzzyB said:Maybe so. The last time I heard of these type chips (those used on the ISS, etc), and it was only a few years ago, they were still using a 200nm process!
So huge leap there, 200nm was around the turn of the century. I'm wondering if there weren't some NASA contracts and/or incentives involved as there was probably a LOT of R&D etc that went into this. The title, at least suggest that anyway.
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TerryLaze Reply
https://newsroom.intel.com/corporate/2024-intel-newsThese are probably the result ,and only part of? ,of the enclave contract and thusly probably already paid for by that contract.Gururu said:I'll bet the quality control standards at least are going to price these in the six-figure range.
But yeah, if you just divide 3bil by the amount of chips that will come out of this at the end, the price will look insane. -
qxp ReplyTerryLaze said:https://newsroom.intel.com/corporate/2024-intel-newsThese are probably the result ,and only part of? ,of the enclave contract and thusly probably already paid for by that contract.
But yeah, if you just divide 3bil by the amount of chips that will come out of this at the end, the price will look insane.
I am not sure this is the right interpretation. One way to look at it, is that Intel was the leading CPU manufacturer for a long time, with a lot of profits and thus a lot of taxes that went to the US government. Now that Intel got in a bit of trouble with chip performance, it makes sense to support it and a contract for something useful is certainly a good way to do that. Note how the contract says that Intel is the only domestic designer and manufacturer of chips. I think Micron is such on the memory front.
Also, as they do(did ?) this contract they will produce a number of wafers, and if we assume that this amounts to only 10000 chips, you get $300k per chip.
Compare this with top-end Altera FPGA ($45k) and the pricing is not that bad.
https://www.mouser.com/en/ProductDetail/Altera/AGIC040R39A2E3V?qs=9vOqFld9vZXmpXcXNRUFOg%3D%3D -
JRStern Reply
This is true but plain lead and/or tungsten shielding works, too.qxp said:One advantage of 200nm is that the transistors are physically bigger and can withstand more energy. 18A seems too tiny for anything like that, and so radiation resistance has to be done through circuit design. Would be interesting to see how they do that.
Probably some feedback to the base chip design too, circuits and rules, making it more robust. -
qxp Reply
Actually not that well. Lead and tungsten would work to shield from X-rays and maybe softer gamma. In space you have high-energy charged particles, in particular muons. When a muon strikes such a shield it generates a shower of lower energy charged particles which make the problem worse than if you just let the muon fly through your electronics.JRStern said:This is true but plain lead and/or tungsten shielding works, too.
Probably some feedback to the base chip design too, circuits and rules, making it more robust.
Here is a nice poster with a chart showing muon energy loss versus distance through the material at the sea level:
https://ulab.studentorg.berkeley.edu/static/doc/posters/s183.pdf
The chart shows that a muon with 1GeV of energy will lose about 60% of it after passing through 0.5 meter of lead. But 1 GeV muons are pretty common - there are plenty of muons with larger energy, but increasing rarity.
See Figure 3 in this paper:
https://arxiv.org/pdf/1606.06907 -
JRStern Reply
Then with any luck they'll pass right through the processor, too.qxp said:Actually not that well. Lead and tungsten would work to shield from X-rays and maybe softer gamma. In space you have high-energy charged particles, in particular muons. ...
But I think the threat is actually minimal even so. I asked Google: "How many high energy muons pass through a cubic meter of space per second in interplanetary space between Earth and Mars?"
and the answer was: "In deep interplanetary space between Earth and Mars, the number of high-energy muons passing through a cubic meter of space per second is effectively zero.
While this might seem surprising since open space is full of high-energy cosmic rays, it comes down to how muons are created and how long they can survive ..."
Just as we don't know how to shield against neutrinos, but we also have very little reason to worry about it.
We have more muons passing through our body every second than these chips will in space.