"the house that Moore built" lol, N1

Well its nice to hear that is AMD doing good. They had so much trouble lately its about time something good happens. I am not sure if AMD's year 2009's processors will be able to compete with Intel's core i7 processors, but i sure hope they will =) It worries me because "Nahalem" will be able to self overclock and such, and intel is thinking about making 32nm processors. It is totaly unbiased comment, I pick my components based on performance

I don't really see producing a new processor as necessarily doing good. They're just... well... doing really. How good they're doing will be seen once the benchmarks arrive. There are a million things that can still poison the well to this point, so don't count your chickens just yet. I road the AMD wave just like a lot of you in the late 90s to early 21st century... but I have to be honest and say that I think their success is greatly due to the fault of Intel and the poor NetBurst architecture that they road on the whole time. Now that that's the past and since Core 2 has been in... it might not be out of bounds to think that AMD might never really compete again in the CPU market. Not the way it has in the past.

Shanghai, a 45nm quad core processor..In order to gain ground on Intel in performance, these new Shanghai based chips will have three times more cache (6MB total)...

AMD can not compete in performance with intel...probably they will have to compete in price. Here is why

1. Nehalem has 8MB L3 cache (25%) If AMD claims more cache will give shanghai more performance, intel is ahead of them.
2. Nehalem will have multithreading (8 logical cores) with automatic turbo mode (overclocking).
3. Intel's 45 nm process is based on metal gates. Extremely power efficient and extremely fast. AMD's 45nm is just a shrink of 65nm old technology.

to Logan81, this round of processors from AMD is not just a die shrink. They too now incorporate metal gates. And as for the cache, some of Intel's processors, which had like 4 MB of cache or more, were on par performance wise with AMD processors which only has a 1 or 2 MB shared cache. I think these chips could be really nice. It would also be nice if there were benchmarks.

No official numbers from AMD yet?

I've heard the 20% performance increase over claim 1,000 times before from all cpu manufacturers.
However even a 10% boost in practical multithreaded server applications would be astounding and welcomed

The important thing you forgot to mention while comparing Intel's cache and AMD's cpu cache is that AMD's chips even since the Athlon line were optimized to run well (and sickeningly fast) with very little cache. Comparing an Intel chip with gobs of L2 cache to an AMD chip with the same amount of cache wont do anything, its how efficiently the cpu's use the cache that matters. Intel using throwing gobs of memory onto its Netburst line was a crutch and temporary fix which seems to have stuck around. AMD's got its own problems too.

Provide a link showing that these CPU's are using metal gates please.

"Shanghai, a 45nm quad core processor, will be available by the end of 2008, beating original expectations."

Aaaah an anomoly in the time stream! The recent estimate of Q1 2009 has switched places with the original estimate in place of Q2 2008.

It appears that AMD has played us all for fools, making us think they're falling behind, when they actually built a time machine and are using it against us. We have to stop them before they go too far, for such anomolies could create a time paradox, the results of which could start a chain reaction that would unravel the very fabric of the space time continuum, and destroy the entire universe! Granted, that's a worst case scenario. The destruction might in fact be very localized, limited to our own galaxy.

http://www.amd.com/us-en/assets/co [...] ss_Q-A.pdf

To anyone saying hyperthreading will do anything for performance it won't. Few programs will use 4 cores effectively, never mind 8 cores.

Nahelem isn't what people make it out to be.

Why are websites reporting Q4'08 as ahead of schedule? Was there an AMD release that required folks to misinform on this? Look at ANY recent AMD roadmap over the last year and they say either H2'08 or Q4'08 for 45nm server chip release (look further back and you would hear mid-2008, with some sites even speculating Q2'08). This is also 2 years after 65nm products not 18months as AMD had told everyone... so how again is this ahead of schedule?

I wonder if people are confusing this perceived "pull-in" with the Q1'09 DESKTOP schedule.... these are server chips. Desktop is still Q1'09.

So Tom's, and specifically Devin, when you say "beating expectations" you really should provide a link where it shows 2009 was the expectation for Shanghai. Since apparently you are too lazy for this... let me provide you some recent roadmaps which show.... Q4'08 (or even earlier) as the plan! (stunning!)

From May08:
http://arstechnica.com/news.ars/po [...] admap.html
http://news.cnet.com/8301-13924_3-10054038-64.html
http://www.eetasia.com/ART_8800521 [...] 3b9bc3.HTM

From Jul07 (which actually had 45nm even earlier then end'08)
http://www.anandtech.com/cpuchipse [...] i=3050&p=2
http://www.informationweek.com/blo [...] es_ag.html

From Aug08:
http://www.xbitlabs.com/news/cpu/d [...] in_Q4.html

Can we stop the cheerleading? If you are going to make claims like ahead of schedule - you should provide the schedule it was (theoretically) ahead of.

Apparently onearmedscissorb is the only person who isn't easily duped.

I thought about it too, but my guess is that for AMD, usual expectations are long delays from their roadmaps.
And when they meet the roadmap, it beats the expectations, lol.

Anyway, it's a good news, despite financial problems, if they make it on time, thumbs up!
I wonder how the problems in US's economy could affect sales. I guess AMD's lower pricing could win more customers, in that environment.

"three times more cache 6mb"

:raise arms and makes angry face:

ABOUT FUCKING TIME AMD

6MB L3 Cache + 2MB L2 Cache = 8MB

The total cache size of the Shanghai is not 6mb. AMD Shanghai uses 2MB's of L2 + 6MB's of L3 for 8MB's total.

Ahem... uhhh.. .how do I say this... ok ok ok GOBS GOBS WTF GOBS of L2 !! thats what u thuink Intel has.. AND if IF AMD is ""Better"" optimized them why wouldnt AMD stomp Intel with an FX chip once every 2 years with "GOBS" of L2!!LOL yea right.. I love AMD but they cant touch C2D "efficiently" with its GOBS AND GOBS of L2!! you kill me kid/..

Ahem... uhhh.. .how do I say this... ok ok ok GOBS GOBS WTF GOBS of L2 !! thats what u thuink Intel has.. AND if IF AMD is ""Better"" optimized them why wouldnt AMD stomp Intel with an FX chip once every 2 years with "GOBS" of L2!!LOL yea right.. I love AMD but they cant touch C2D "efficiently" with its GOBS AND GOBS of L2!! you kill me kid/..

I'll bet that almost everyone reading this article is using a program that can use as many cores as your throw at it. Its called Microsoft Windows.

Lets also not forget that HT isnt adding a core ffs. HT trys to do what ddr does and use both sides of the clock cycle. It trys to use the refresh cycle of the cpu to process a small bit of information it isnt a logical core otherwise it would be a 8 core not a 4 core. Not to mention of course HT didnt really do a whole hell of alot before i doubt it will be different now.

To a point however more cores will release the system from lagging programs running. Games might not use 4 cores unless they are multi threaded but windows and load balance pretty well i believe the cap is around 16 cores then the advantages of adding more is to low for the cost and power also cooling them.

If amd doesnt do something on thier next release that makes me wana buy a new AMD i might go back to using intel which i switched from back in the K6-2 - 300 days when buying a cpu and mobo from amd was $80 and a p-2 was $400 for just a cpu. Sorry AMD but get your chips inline or you lost another customer

By the way, HyperThreading is just having an extra set of hardware execute and data registers. The general idea is that most code is sequential and subsiquent instructions rely on the previous instructions finishing, which stall the CPU pipeline (Known as a data hazard in Engineering). So instead of executing just one thread, alternating between two threads theoretically will eliminate the data dependency between instructions as you are executing two completely different threads, which uses all stages of the pipelines.

FFS read what you link - nowhere does it say there that the first 45nm CPU's are using metal gates - it just says they have the option later on down the road.

Show me something that says the upcoming *announced* procs are using them...you can't because they aren't...fail.

I agree with boduke. Also, does not say the first CPU will have Ultra-low-k Dielectrics. Only that in some later 45nm products it will be available.

"Ultra-low-k Dielectrics. In some later 45nm products, AMD plans on using ultralow-
k dielectrics to reduce wire delays by as much as 15 percent and enable greater
overall processor performance.
• High-k/metal Gates. As part of AMD’s Continuous Transistor Improvement (CTI)
approach, AMD has the option to introduce high-k/metal gates into 45nm production
to further enhance transistor performance. The “gate first” approach, developed with
IBM, is designed to provide a simpler, less time consuming way to migrate to high-k
metal gate technology and secure benefits that include improved performance and
reduced power consumption."

I think if AMD had this advance process nailed down to the point where they could actually produce CPU with it, it would be all over the NEWS/web. The fact that AMD does not have this process right now might mean that IBM has not transferred a robust process to AMD or they are not sharing it yet..

Intel's 6,8,10,12MB+ of cpu cache is compensation for off-chip memory controllers dude. I call that GOBS of cache.

I'm not sure why people claim AMD is in a terrible position. In the 80's and most of the 90's, they were either making exact duplicates of Intel chips, or poorly designed compatibles. When AMD released the K7/Athlon in 1999 they jumped way over Intel in performance. They held that performance lead until Intel released Core2 in 2006. As such. I don't see why AMD's current situation should be dire since they've only been without the lead for a couple years. I think AMD can and will excel past Intel again, just don't keep holding your breath every time a new processor rolls off the line, that's just dumb.

"I don't see why AMD's current situation should be dire since they've only been without the lead for a couple years."

It's call DEBT and >$5Billion of it. They have limited ability to raise cash; which has only worsened with the general worldwide credit tightening (not that AMD would likely qualify for credit even if this were not the case). This restricts AMD's ability to fund normal operating expenditures - hence job cuts, cuts in capital spending (which limits future capacity plans), cuts/slowdown in R&D spending.

AMD now pays $95Mil every quarter (or $0.38Bil/year) in pure interest expense. To put this in perspective, effectively ~$5-$6 of every CPU AMD sells goes just to paying interest.

People don't seem to understand business health is not merely measured by product performance. Perhaps now you can see why AMD's position may be a little more dire than just considering product performance gaps?

"The fact that AMD does not have this process right now might mean that IBM has not transferred a robust process to AMD or they are not sharing it yet.." (highK/metal gate)

IBM is now on record as saying they will not move to high K until 32nm for logic products, thus it would appear unlikely AMD would do so earlier (unless 32nm was way late and they had no choice). Despite AMD's claim, this is not a simple "drop-in" - there is new tooling involved, other process steps are impacted and would need to be re-tuned, products would need to re-certified (the gate oxide failure modes are different for HighK vs conventional SiON), and in all likelihood the CPU's would need to be re-layed out - meaning new mask sets and potentially a couple of steppings to debug.

As for the ultra low K, the press on this is just as misleading. AMD conveniently claims a 15% wiring delay improvement, which is completely true! Butttttttt, this will not translate to an overall 15% speed improvement as they are still limited by transistor switching speed! Hence you conveniently see no actual claim of overall speed improvement and you hear "enable greater processor performance".... well it is only enabling it if you also speed up the transistor (though this little factoid is conveniently omitted). If nothing is done to the transistor at the the time the magic ultra low K process is implemented you will see very little actual overall improvement - what will happen is you will get electrons to and from the transistor faster but you'll still be spending the majority of the time waiting for the transistor to switch on and off.

Hence the clever choice of words on all these press releases - everything is technically accurate and many people are completely misinterpreting it. Not truly AMD's fault, but they are somewhat complicit as they create these vague press releases and appear to be attempting to capitalize/prey on people's lack of technical understanding. If they wanted to they make these press releases a lot more direct.

I am still waiting for the AMD statement mentioning they are using metal gates in shanghai....

Now...penryn is already beating barcelona with and old FSB and without integrated memory controller. (see the latest CPU chart) If you add the IMC and QPI the performance boost must be huge.

Netburst vs athlon was a competely different history. Now intel has a clear advantage and AMD just have buggy chips and incomplete marketing statements

point of comparison between "Shanghai" Opterons and Core i7 is not a very smart one as you're comparing processors for VERY different market segments.

Most people just simply don't have the mind to be able to load a 4-core system to its fullest extent. And the people that can and/do, are probably also the same group of people whose demand for computational power will ALWAYS outpace what Moore's law otherwise allows (namely, the HPC, scientific, and engineering groups.)

Only a few have been able to successfully transition into this new programming and application development paradigm.

To the guy talking about AMD's debt. I believe they paid off that ATI aquisition or will have once the fab sale goes through i swear i read it paid off the 5 bill they barrowed to buy ATI. Could be wrong but im pretty sure if they still have debt its not near as close to 5 bill anymore.