PCI Express 2.0 Details

PCI Express 1.1 and 2.0 slots are the same mechanically. The upper one has all the 164 pins required for a x16 PCI Express connection, while the lower connector is utilized for PCI Express x1 and has 36 pins.

While PCI was a 32 bit or 64 bit parallel bus that had to be shared by all client devices, PCI Express is a serial interface based on point-to-point links. This means that bandwidth is exclusively available for each device, and multiple connections are handled via PCI Express switching, similar to how Ethernet switching works . Despite the tremendous differences when compared to parallel PCI, PCI Express is software compatible with PCI, meaning that any operating system that supports PCI will also work with PCI Express.

PCI Express utilizes two connection pairs that operate at a 2.5 GHz base clock speed. Using an 8/10 bit encoding method — meaning that 10 bits gross are transferred to reach 8 bit net bandwidth — a single PCI Express connection reaches 250 MB/s gross bandwidth. As there are two connection pairs, you’ll get this bandwidth in both the upstream and downstream directions. PCI Express can deliver much higher bandwidth by combining multiple connections, which are referred to as lanes. Thus, x8 PCI Express offers eight times the throughput (4 GB/s) of a single lane connection, while x16 PCI Express, which has been the interface for all sorts of graphics cards, can access a total bandwidth of 8 GB/s.

PCI Express 2.0 doubles the transmission speed to 5.0 GHz, and hence doubles the throughput to 16 GB/s peak bandwidth of x16 PCI Express. We’ll find out in this article whether or not this is necessary for current graphics cards; but it is certainly the case that the new standard offers more flexibility to hardware manufacturers. Since four PCI Express 2.0 connections deliver the same bandwidth as eight PCI Express 1.1 links, it’s possible to create interconnects to either double the throughput, or to optimize power requirements by switching from 1.1 to 2.0 mode at half the number of lanes. In addition, PCI Express 2.0 still supports 1.1 speeds, which allows for further energy savings due to the links’ speed reduction from 5.0 to 2.5 GHz when throughput isn’t required. If properly implemented, PCI Express 2.0 automatically negotiates link width (from a few to 16 links) and link speed (2.5 or 5 GT/s). This also means that PCI Express 2.0 graphics cards are compatible with PCIe 1.1 motherboards: they will simply stay at the 2.5 GB/s link speed.

Another improvement between PCI Express 1.1 and 2.0 is the maximum power that can be provided for PCI Express graphics cards (PEG). While this used to be 75 W plus 75 W auxiliary power for PCI Express 1.1, PCIe 2.0 now supports a maximum of up to 300 W when fully implemented on a motherboard. Graphics board designers still have to work with auxiliary power connectors, though — PCI Express 2.0 compliant power supply units now require an 8-pin auxiliary power port in addition to the 6-pin connector, which has been around since the introduction of PCIe in 2004.