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DDR2 Latency Times

Source: Micron DesignLine Vol. 12, 3Q03

The illustrations show the latency times during the read process. However, the latency times during the write process have also changed: while conventional DDR memory can record data exactly one cycle after the actual write command, this could go awry with DDR2 due to the higher clock rates. Thus, the write latency is calculated by using the read latency minus one clock cycle.

Patrick Schmid
Patrick Schmid
Editor-in-Chief (2005-2006)

Patrick Schmid was the editor-in-chief for Tom's Hardware from 2005 to 2006. He wrote numerous articles on a wide range of hardware topics, including storage, CPUs, and system builds.