Semiconductors

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Imec Building
Imec's 2026 roadmap details 0.3nm nodes by 2038, CFET transistors become viable at 0.7nm

By Anton Shilov Published

Premium As CPP shrinking stalls, chipmakers find a new way to increase transistor density. Imec foresees 0.3nm in 2038, CFET insertion in 2038, HLSI era.

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IBM
IBM goes sub-1nm, develops 0.7nm-class technology

By Anton Shilov Published

IBM's new 0.7nm-class fabrication process uses nanostack transistors, requires 2x more FEOL steps for massive improvements in performance, power, and area.

Semiconductors
TSMC is reportedly hiking prices for 'all advanced nodes,' accounting for 74% of the company’s wafer business

By Etiido Uko Published

TSMC has reportedly told customers to prepare for 5% to 10% price hikes across advanced chip nodes, extending beyond 3nm to include 7nm and some legacy processes.

Semiconductors
ASML Monopoly
Rare ASML Special Edition Monopoly board unearthed in social media trade

By Mark Tyson Published

We just witnessed a significant semiconductor industry related non-cash trade deal take place on Twitter/X.

Semiconductors
ASML denies US government report that its EUV chipmaking tool was shipped to China

By Anton Shilov Published

U.S. Commerce Secretary Lutnick expresses concerns in a conversation with ASML executives that China has an EUV lithography system as ASML denies shipping such scanners to the PRC.

Semiconductors
Post-silicon era gets closer as industry giants crack the 2D transistor scaling bottleneck with breakthrough tech

By Luke James Published

Imec, ASML, and TSMC have integrated both n-type and p-type transistors with atomically thin 2D channels on a single 300mm wafer.

Semiconductors
Intel's fab roadmap examined — Arizona, Ohio, Ireland, and the two deadlines deciding 14A process node

By Luke James Published

Premium This roadmap provides an in-depth analysis of Intel's current plans for its chip production capacity.

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Intel’s performance-enhanced 18A-P promises 9% performance improvement at iso-power, cuts thermal resistance by 40%

By Jake Roach Published

Intel's enhanced 18A-P has entered risk production, laying the groundwork to ramp the node into full production in the coming months.

Semiconductors
Chinese fab SMIC's 7nm metal pitch beats Intel 18A but lags 38% on density, teardown finds

By Luke James Published

SemiAnalysis has published the first teardown from its new in-house lab, focusing on the minimum local metal pitch on SMIC’s third-gen 7nm at 32.5nm.

Semiconductors
TSMC says panel packaging won't replace CoWoS anytime soon for the largest future AI processors

By Anton Shilov Published

CoPoS may enable larger chips, but CoWoS is still better.

Semiconductors
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