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Conclusion: DDR400+ Only Suitable For Overclocking

More Speed = More Performance? Fast DDR Memory from TwinMOS and Buffalo Technology Put to the Test
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At first blush, it’s hard to get too excited about the results for manufacturers TwinMOS and Buffalo Tech : despite higher clock speeds of up to 466 MHz (233 MHz with double-data-rate), the fast modules don’t seem to be able to capitalize on their advantages. Paradoxically, the fastest system configuration has the RAM working synchronously with the FSB clock. If you have a fast Athlon XP with FSB333, this is nothing but DDR333 - business as usual.

Although the use of faster timings (5-2-2 and CAS Latency 2) can raise memory performance by leaps and bounds, the overall performance remains unchanged : for the Athlon XP, DDR333 is the memory of choice - all other setups suffer from asynchronous memory operation, in some cases severely.

All the same, there is an area of use where the fast chips from TwinMOS and Buffalo Tech have a real justification : classic overclocking.

Unless you go to great lengths, modern systems can only be overclocked if you increase the FSB clock. And will that ever pay off : simultaneously raising the processor, FSB and RAM clocks puts massive performance improvements within reach - as well as risks to system stability. In that light, the RAM from TwinMOS and Buffalo Technology offers the largest reserves encountered so far. We have purposely omitted overclocking benchmarks with top RAM clocks in this article because, while that may tap into a wealth of extra performance, it’s less efficient because of the asynchronous memory mode.

But there’s another bright spot with Buffalo Tech and TwinMOS : raising the FSB speed for the Athlon XP is a done deal at AMD. That means that DDR400 should become the darling of the demanding public overnight since this memory can be run synchronously with the FSB. The necessary leeway for further overclocking is already provided by Buffalo Tech and TwinMOS. We would like to see even faster modules that can work with a CAS latency of two clock cycles, too.

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