AMD Details 'Ambidextrous' Solution That Bridges x86, ARM
AMD is hoping to merge the x86 and ARM ecosystems with 'ambidextrous computing.'
AMD today hosted an innovation update for investors and members of the press to talk about how it’s realigning its strategy based on a new solution called 'ambidextrous computing.' The company has been working on this solution for two years and the end result is an ARM-based SoC that is pin compatible with AMD’s next-gen x86. Dubbed Project Skybridge, this will allow users to have a motherboard that runs ARM and x86.
This design framework is a family of products on the 20nm process and will use Puma+ on the x86 side and A57 on the ARM side. It’ll feature HSA as well as AMD GCN (Graphics Core Next) and will be Android compatible -- a first for AMD. Though AMD’s meeting today was heavy on Seattle and what it means for the server market, the company has said that Skybridge will target the client/embedded markets for 2015, with nothing for servers.
AMD also talked briefly about its plans for 2016, which will see the company debut its own custom-developed 64-bit ARM core design. The company didn’t offer much in the way of information but did tell us that this 64-bit ARMv8 CPU core will be in servers and embedded solutions along with semi-custom and ultra low power client devices. We’ll also see a matching x86 design around the same time. Again, not a whole lot of information on that right now, but we'll keep you posted.
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A lot of integrated action in there. Hopefully it will go well. Probably it remains unused opportunity... There are so many things that requires full implementation by programmers, that it is almost scary thing to think about. All good ideas that only need support from program developers.
I guess this could lower manufacturing costs a bit, but it doesn't seem like a big deal to me.
I guess this could lower manufacturing costs a bit, but it doesn't seem like a big deal to me.
what they mean is that the chip will have both an x86 cpu ....and.... an ARM cpu on the same die, the ARM cpu will be an A57 so that should give an idea of performance.
I'm pretty much certain they mean one socket/motherboard that can accommodate either an x86-based SoC or an ARM-based SoC. AMD has used the same bus across different architectures at least one before when they bought out DEC and decided to reuse the Alpha 21264's EV6 bus for the early Athlons.
If a single chip had both x86 and ARM, there would be no point in mentioning that the socket is pin-compatible across x86 and ARM compute.
I'm pretty much certain they mean one socket/motherboard that can accommodate either an x86-based SoC or an ARM-based SoC. AMD has used the same bus across different architectures at least one before when they bought out DEC and decided to reuse the Alpha 21264's EV6 bus for the early Athlons.
If a single chip had both x86 and ARM, there would be no point in mentioning that the socket is pin-compatible across x86 and ARM compute.
you know...i think you're right...rereading the article it seems that the isn't to have 2 cpus on one die, but to have one pin compatible for both architectures.
I still think for consumer facing products we should be consolidating architectures instead of maintaining this divergence.
Can't wait to see how this turns out.
http://www.anandtech.com/show/7989/amd-announces-project-skybridge-pincompatible-arm-and-x86-socs-in-2015
http://www.anandtech.com/show/7990/amd-announces-k12-core-custom-64bit-arm-design-in-2016
Actually Mullins APU released last month has something called AMRTrustzone that has an embedded single ARM core within already.
http://www.anandtech.com/show/7974/amd-beema-mullins-architecture-a10-micro-6700t-performance-preview
Plenty of stuff have one or more ARM or other form of CPU/microcontroller to handle self-contained tasks. Many high-security microcontrollers have dual microcontrollers where the "outer" microcontroller handles the interface with the external world while the "inner" microcontroller handles secure transactions with no externally accessible input or output.
Having cores dedicated to different instruction sets sharing duties as main application processor on the other hand sounds like a pretty wild gamble. I am having a hard time imagining system administrators being pleased with mixing multiple binary images in a single system. If the goal is security, security that has to be tight enough as to require the use of completely independent cross-checking on a different CPU architecture would probably require the elimination of potential side-channel attacks from those CPUs sharing the same system bus, RAM, IO, etc. which means the checks-and-balance would need to be on physically isolated independent systems. If it was big.LITTLE, mixing low-power x86 cores with high-power ones could do that too without the need to mix instruction sets.
Guess we'll see in 2016.
AMD didn't buy DEC. AMD only licensed the EV6 bus from DEC, and as you say used it in Athlons. It was Compaq who bought out DEC in 1998. In 2001 HP bought out Compaq, and since HP had already committed to get out of processor design, the deal included the transfer of the Alpha design division from Compaq to Intel.
I think AMDs construction efforts are much smaller than this. They are building a Skybridge over Has Well. Although I don't know why they need a bridge over a well.