Arne Verheyde

Intel will analyze sprints at the 2020 Summer Olypmics in Tokyo using its new 3D Athlete Tracking technology.

A new series of Linux kernel patches indicate0 that support for Gen12 graphics for Tiger Lake is well underway.

Samsung announced it had developed the industry's first Key Value SSD that is compliant with the new open standard for KV SSDs, which can significantly reduce CPU overhead for storage workloads

IBM today announced new services aimed at education of quantum computing. These include new 5-qubit quantum systems, a feature for scheduling system time, an open-source textbook and a video series.

YMTC has started volume production of its first 3D NAND process. It manufactures the 64-layer, 256Gb TLC dies with its Xtacking technology for putting the CMOS under the NAND array.

Intel on Tuesday laid the cornerstone for a new eight-story Global Development Center in Jerusalem, Israel. When it is completed in 2022, it will provide work for 2,700 employees.

Huawei outlined its options for gaining independence from US semiconductor firms, including its new Ascend chips.

HPE has built a 3.69 PFLOPS supercomputer for NASA in support of the Artemis program. Based on Intel's Cascade Lake, the supercomputer is located in a new NASA computing facility.

Intel has started Linux kernel development for what appears to be a new Atom SoC family, codenamed Lightning Mountain.

IBM has open-sourced the POWER ISA and key hardware reference designs, the company announced at the OpenPOWER Summit. It is also joining the Linux Foundation.

Xilinx today announced the Virtex UltraScale+ VU19P. With 35 billion transistors and consisting of four individual dies on an interposer, it is the industry's largest FPGA.

Micron opened its latest 3D NAND Fab 10 expansion in Singapore last week. The expansion will support the companies' 96-layer and beyond process nodes.

TSMC's first blog post states that Moore's Law is not dead, with N5P as its latest node. The company also talks up its advanced packaging techniques with a huge interposer.

Xilinx on Tuesday announced the Alveo U50 accelerator card for the data center. The card has a 75W TDP, 8GB of HBM2 and support for PCIe 4.0 and the CCIX interconnect.

Intel today announced for D5005 Programmable Acceleration Card with Stratix 10 SX, the second of the portfolio following last year's PAC with the 20nm Arria 10 GX.

Intel has killed the Omni-Path 200 series HPC fabric, as reported by CRN, though the company will continue to support OPA100. OPA200 was supposed to launch this year.

Intel has announced it is selling the majority of its smartphone modem business to Apple for $1 billion. The deal includes 2,200 employees that will join Apple.

Intel and Apple are in “advanced talks” over the sale of Intel’s modem business, reportedly worth at least $1 billion, according to a report from The Wall Street Journal.

AMD on Thursday announced it has joined the Compute Express Link (CXL) consortium, the consortium for the PCIe 5.0-based cache-coherent interconnect.

Intel has quietly launched the Xeon Platinum 8284, the new Cascade Lake-SP flagship with an increased base frequency of 3.0 GHz and a list price over $15,000.

Intel announced it has scaled up its 14nm Loihi neuromorphic chip to a 64-chip system, containing over 8 million neurons, and plans a 100 million system by the end of the year.

Tachyum is developing its Prodigy 'universal processor': 64 cores at 4GHz, DDR5, and 72 PCIe 5.0 lanes, packed into just 290mm squared.

Cisco has acquired Acacia Communications for $2.6 billion. Acacia is its supplier of optical interconnect technologies. Cisco views the coherent optical networks market as a growth opportunity.