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DRAM Settings

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10:55 AM - 08/08/2007 by Thomas Soderstrom

All tests were conducted using Super Talent's DDR3-1600 at 2.00 volts.

Though the highest memory speeds often benefit synthetic memory benchmarks, the best program performance often comes from lower frequencies at reduced latencies.

We found Super Talent's DDR3-1600 perfectly capable of reaching CAS 4.0 (4-4-4 timings) using a slower 1066 MHz data rate, and for the sake of comparison chose a 12-cycle tRAS setting to match the timings previously used with our DDR2-1066 samples. This setting was used as the "baseline" for testing the Core 2 Duo E6750 at its stock 2.66 GHz clock rate, as well as testing the Core 2 Extreme QX6850 at both its stock 3.00 GHz (9x 333 MHz) clock rate and at an E6750-matching 2.66 GHz (8x 333 MHz).

In order to take the E6750 to 3.00 GHz, we needed to raise its bus speed. Leaving the RAM at the same FSB to DRAM ratio as above pushed its data rate to 1200 MHz, which also required loosening its timings to 5-4-4. Moving away from the clock-for-clock comparison to DDR2 RAM allowed us to drop its tRAS to 8 cycles.

Because the Core 2 Extreme QX6850 required a higher multiplier and lower bus speed to reach its highest core clock speed, leaving its FSB:DRAM ratio at 5:8 only required loosening its timings slightly.

Meanwhile, the Core 2 Duo E6750's low 8x maximum CPU multiplier required a super high bus speed with a lower 2:3 FSB:DRAM ratio to maintain reasonably-short latency settings.

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