AMD Says It Could Bring Chiplets to Thinner Ryzen Laptops

Ryzen Mobile Processor
(Image credit: AMD)

AMD has confirmed that it could potentially switch its Ryzen mobile CPUs from a monolithic design to a chipset-based design in the future, just like its Ryzen desktop and EPYC server CPUs, according to a report from QuasarZone,. The only caveat behind this strategy, however, is that AMD will need to find enough of a performance/feature improvement in a chiplet-base design first before it can make the switch.

AMD released these details in a recent Q&A session it held with the press in Korea. AMD shed light on its chipset-based approach to mobile CPUs in response to a question asking why its chipset-based architectures have not been introduced into the laptop market yet, particularly the ultra-thin/ultralight notebook market.

"When creating the product, we are considering both monolithic and chiplet structures. Both desktops and laptops," said AMD General Manager David McAfee, per a machine translation. "However, on the laptop side, it is difficult to introduce chiplets because of the major obstacle of power. Since there is a power penalty to be paid when introducing chiplets, it seems that chiplets can be introduced at a time when it is judged to be worth it.

So far, considering such factors, the results have shown that monolithic structures are more cost-effective and efficient in the laptop market than chiplets. If there is an incentive to risk it and move in the future, I think I would consider a chiplet."

AMD's response reveals that chipset-based designs aren't the "end all and be all" of CPU design philosophies. Both designs — monolithic and chiplet, have their advantages and disadvantages. Monolithic designs are particularly beneficial in more compact environments where die space is at a premium, and they also improve a CPU's power efficiency since all of the components sit much closer to each other, requiring fewer/smaller traces for the individual components to communicate with each other.

Chiplet designs are typically more advantageous in the high-performance market, where performance is prioritized over power consumption. In AMD's case, it has found that utilizing multiple compute dies (CCDs) in one chip is more cost-effective than creating one ginormous compute die. This method enables AMD to more efficiently utilize the real estate of each wafer it gets access to and improves the yield potential of each chip on a wafer (less chance of a defective chip).

Technically, AMD has already launched a few chiplet-based mobile CPUs for high-performance gaming/workstation laptops, including its Dragon Range chips like the Ryzen 9 7945HX and the Ryzen 9 7945HX3D with 3D-VCache technology. But these chips are targeted at big and bulky desktop-replacements rather than slim and sleek laptop designs.

Intel will be the first CPU manufacturer to take a chiplet-based philosophy to the laptop market in full force. Its upcoming Meteor Lake architecture plans to bring all of the advantages afforded by chiplet-based designs to the table without the power consumption penalties usually associated with chiplet architectures. 

Intel is doing this by implementing a clever power delivery system in Meteor Lake processors that will intelligently turn off chiplets (or tiles) that are not in use. Intel's power-saving capabilities are so aggressive that it will even allow the compute die (Intel's equivalent to a CCD) to be completely switched off when the chip is in an idle state.

If Intel's successful, it will prove that chiplet-based designs can work in a laptop solution, which could spark AMD to create its own purpose-built chiplet-based laptop designs in the future.

Aaron Klotz
Contributing Writer

Aaron Klotz is a contributing writer for Tom’s Hardware, covering news related to computer hardware such as CPUs, and graphics cards.

  • bit_user
    Leading up to the launch of RDNA3, AMD said it made huge breakthroughs in the efficiency of die-to-die communication. Perhaps that's the new enabler for using chiplets in laptop processors.
  • JayNor
    I think AMD has to be selective about using advanced packaging while TSM is expanding their CoWoS capacity over the next year to service the ai chip demand.
  • pug_s
    Right now, the AMD's Ryzen 3000, 5000 and 7000's chips has a considerable distance between the IO Die and the compute dies which cause this kind of power penality. Perhaps it is possible to do this by copying Apple m1 max/pro SOCs by putting 2 chips together.