AMD and Arm Form the Backbone of EU's 400 Petaflops "EuroExa" Supercomputer

Supercomputer rendering
(Image credit: Shutterstock)

The European Union, via a €20 million grant through its "EU Horizon 2020" initiative, is looking to deploy a 400 petaflops supercomputer on European soil between 2022 and 2023. The supercomputer is being developed under the EuroExa project umbrella, which aims to rebalance the world's scales when it comes to the availability of supercomputing performance.

The supercomputer is expected to scale up to a maximum theoretical throughput of 400 petaflops while consuming up to 30MW of power, deploying technology from AMD, ARM, and a number of other providers in what amounts to a heterogeneous supercomputer. It's projected that the supercomputer will occupy an area equivalent to 30 shipping containers, about 40 meters from one edge of the system to the other.

Latest Videos FromTom's Hardware
Francisco Pires
Freelance News Writer

Francisco Pires is a freelance news writer for Tom's Hardware with a soft side for quantum computing.

  • Nikolaus_E
    Thank you for the extremely interesting article! If you take a deeper look to the EuroExa site, you will find that the Arm CPUs are in fact Xilinx SOCs with FPGA parts to be programmed by Maxeler which is BTW a close alliance partner of Xilinx. This could mean that we see here one of the first huge deployments benefiting from the anticipated merger of AMD and Xilinx!

    In the documentation this information is somewhat hidden in the background while the role of Arm and Maxeler is highlighted. The reason seems to be that this is an european project and the participants want to point out the importance of european companies with both Arm and Maxeler are being located in England.
    Reply
  • Soaptrail
    Did anyone else read this and first think they were talking about RGB and then upon rereading it thought they were talking about CBD?

    To facilitate the integration of all of these hardware pieces working in concert, the grant has also been used in the development of a Co-design Recommended Daughter Board (CRDB). The CRDB will include all the hardware parts (from AMD, Arm, and Maxeler), and will enable a direct connection to a smart IO controller, unifying storage and communication services with the application host. These CRDB units will then be scaled, with 16 of these CRDB modules deployed across four multi-carriers to create a single Open Compute Unit blade (1OU).
    Reply
  • Nikolaus_E
    The infos are in the latest youtube video in the media section pretty much at the end around 1h:33m where AMD Epyc and Xilinx are mentioned but it's hard to understand how Xilinx is exactly involved …
    Reply