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Intel’s performance-enhanced 18A-P promises 9% performance improvement at iso-power, cuts thermal resistance by 40%
By Jake Roach published
Intel's enhanced 18A-P has entered risk production, laying the groundwork to ramp the node into full production in the coming months.

Chinese fab SMIC's 7nm metal pitch beats Intel 18A but lags 38% on density, teardown finds
By Luke James published
SemiAnalysis has published the first teardown from its new in-house lab, focusing on the minimum local metal pitch on SMIC’s third-gen 7nm at 32.5nm.

TSMC says panel packaging won't replace CoWoS anytime soon for the largest future AI processors
By Anton Shilov published
CoPoS may enable larger chips, but CoWoS is still better.

Analyzing TSMC's fab expansion roadmap — multi-fab N2 ramp, CoWoS, SoIC, and uncorking bottlenecks
By Anton Shilov published
Premium TSMC kicks off unprecedented capacity expansion plan.

Chinese startup claims photonic chip production without DUV lithography, says nanoimprint process cuts costs by 90%
By Etiido Uko published
Chinese startup Prinano claims it produced 8-inch photonic chip wafers without DUV lithography, using nanoimprint technology that cuts costs by 90%.

TSMC CEO C.C. Wei says, ‘It will be a long time before we can meet customer demand’
By Jowi Morales published
All this demand for AI chips is just too much for one company.

Samsung shows first HBM5 mockup with Heat Path Block cooling
By Luke James published
Samsung displayed its first physical mockup of HBM5 memory at Computex 2026 in Taipei, pairing the eighth-generation AI memory with a new in-package cooling structure.

Korean tech workers splash cash on luxury brands after bumper bonus payouts
By Mark Tyson published
South Korean media has noted a surge in spending on luxury goods following big bonus payouts to semiconductor workers.
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