Renesas and Matsushita develop technique for stabilizing operation of 45nm on-chip SRAM

Renesas Technology and Matsushita Electric Industrial have announced the development of a technique that achieves stable operation with 45nm process generation bulk CMOS for SRAM that can be embedded in SoC (system-on-chip) devices and microprocessors (MPUs). Tests of experimental chips with 512-Kbit SRAMs employing this technique have confirmed stable operation over a wide temperature range (-40 degrees C to 125 degrees C) and a larger operating voltage range margin with respect to process variations, according to the companies.

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