The Ultimate Phison E7 Prototype NVMe SSDs

Introduction

Today we look into the future! It's not a crystal ball or a Ouija board, but we have parts straight from Phison's skunkworks-like project lab that are normally in stealth mode before they emerge as retail products. The double-DDR model should come to market this year, and several companies have already discussed it at CES. The real star of this show is the most aggressive emulated SLC prototype we've ever seen. They say SLC is dead, but long live low-latency single-level cell NAND, even if it's MLC programmed in SLC mode.

Latest Videos FromTom's Hardware
Chris Ramseyer
Contributor

Chris Ramseyer was a senior contributing editor for Tom's Hardware. He tested and reviewed consumer storage.

  • kalmquist
    If it were purely a matter of cost of materials, one might expect a 240 GB SLC drive to cost the same as a 480 GB MLC drive. That would probably get some customers looking to combine a fast boot drive with a slower drive for mass storage, but not necessarily enough to cover the engineering and validation costs.
    Reply
  • jchang6
    An SLC device priced the same as 2X capacity MLC would definitely be interesting, more so if it could be programmed by the user
    Reply
  • drajitsh
    It is speculated that Samsung Z-nand could be 3d-SLC. With a large memory buffer (with power loss caps, of course), a specially made for SLC controller, and a SLC specific firmware it could challenge intel x point.
    Reply
  • lsorense
    Using the flash in pseudo SLC mode does not mean ignoring half the flash. It also does not mean using twice as many cells to store things. What it does mean is that instead of storing 2 bits per cell as MLC does, you store 1 bit instead, by not using the two middle voltage levels. So if MLC mode stored 00, 01, 10, and 11 using the voltages 0, 0.5, 1.0 and 1.5 (I am sure these are not the right ones, but it's the idea), pseudo SLC mode would just store 0 and 1 using 0 and 1.5 volt. This has the advantage for reliability that you can treat any cell with a value of between 0 and 0.6 as a 0 and any value between 0.9 and 1.5V as a 1, which is much more tolerant of cell wear than MLC mode where you have to be more in the range of 0 to 0.2V, 0.4 to 0.7V, etc. Since it has much more tolerance, it can stay working much longer than in MLC mode. Whether using it in pseudo SLC mode makes it any faster than MLC I don't know. I don't actually see why it should, but perhaps reading and writing the middle voltage levels is slower than just the top and bottom.
    Reply