Chinese scientists discover method to cut defects by 99% with DUV chipmaking equipment, but it destroys EUV pattern fidelity — analyzing photoresist clustering with cryo-ET at 105°C
Lowering defect densities and increasing yields are the key challenges for chipmakers and chip designers who use hundreds of methods for both tasks. This is because semiconductor fabrication technologies involve thousands of steps, and each can affect defect rates and yields. A recent discovery by researchers at Chinese universities has revealed how resists behave during development and how the post-exposure bake (PEB) step can reduce defect density by up to 99% in some cases, according to a paper published in Nature. However, despite these bold claims, the study has dubious practical use.
Researchers from Peking University and Tsinghua University have managed to visualize how photoresist molecules dissolve, migrate, and entangle within developer liquid during the pattern-forming (development) step. To do so, the team used cryogenic electron tomography (cryo-ET) to reconstruct the true 3D structure of photoresist polymers in their hydrated state at sub-5nm resolution.
The study revealed that most photoresist molecules accumulate in clusters at the gas–liquid interface rather than being evenly distributed in solution, which generates defects. The scientists claim that a slight increase in post-exposure bake (PEB) temperature — from 95°C to 105°C in their case — and maintaining a continuous developer layer prevented these clusters, cutting defect density on 300mm wafers by over 99% using existing resists and DUV equipment.
However, it is worth noting that chipmakers carefully select PEB temperatures for each process technology to achieve the best possible results, which limits the practical implications of the research.
To make it easier to understand what was discovered, here's a sequence of steps within a lithography step.
- Coating: The wafer is spin-coated with photoresist.
- Exposure: Ultraviolet (UV) or Extreme Ultraviolet (EUV) light passes through a mask to selectively expose regions of the resist.
- Post-Exposure Bake (PEB): The exposed resist is gently heated to activate the acid-catalyzed chemical reactions that change solubility.
- Development: The wafer is rinsed with a developer solution (often TMAH in water for DUV), which dissolves the exposed or unexposed parts of the resist, depending on the resist type, to create a thin liquid film of developer and form the patterns. This step was the focus of the research.
- Rinse and Dry: The remaining pattern is cleaned and dried for subsequent processing.
The study in the development phase discovered that these photoresist molecules form weak, reversible entanglements that lead to microscopic clusters, which turn out to be the hidden source of pattern defects seen on processed semiconductor wafers.
A hidden process
In immersion and EUV lithography, the developer's liquid film dissolves light-exposed regions of the resist, transferring the pattern to the wafer. While the process is well known across the industry, until now there was no clear understanding of the microscopic behavior of chemically amplified resists (CARs) during pattern development, as existing methods such as scanning electron microscopy (SEM) could only observe dried residues or indirect effects. As a result, process engineers usually rely on trial-and-error tuning of resist chemistry and developer composition, since nobody has observed the real-time behavior of photoresists during development.
Instead of using SEM or atomic-force microscopy, the researchers used a cryo-electron tomography tool — usually used in structural biology to study cells, protein complexes, or viruses in frozen states — to visualize the behavior of photoresists inside a developer liquid at nanometer resolution. To do so, they had to go to great lengths in sample preparation, vitrification speed (the cooling rate at which a liquid changes state without crystallizing), and electron-beam control.
For their research, the scientists used a poly(methacrylate)-based CAR, which is widely used in 193nm immersion and 13.5nm EUV lithography.
An observation
Cryo-ET imaging revealed that the CAR polymers — frozen in their natural liquid state — were preserved as flexible, thread-like chains with random coiled shapes. Analysis of the polymer density revealed that the concentration decreased sharply with depth: in 25nm– 100 nm-thick films, about 80% of the polymer mass accumulated near the gas–liquid interface. Hence, contrary to long-standing assumptions, the resist polymers were not evenly dispersed in the developer but were concentrated at the film surface, where they later formed clusters that caused pattern defects. The same pattern was observed with other resists (e.g., designed for 248nm and 365nm exposures) demonstrated the same pattern, but this was never a problem until recently. Control samples with only the developer showed no surface signal, confirming that the effect came from the polymers themselves.
Further 3D reconstructions (combination of hundreds of low-dose electron images taken at different tilt angles) showed that inside the film, 12nm-long polymer chains stayed mostly separate, while near the surface they gathered into 30 – 40nm clusters, dimensions well above the sizes of killer defects in modern technologies.
However, these clusters are reversible by heat and are not observed in real life. In fact, killer defects in modern nodes are an order of magnitude smaller, which implies that the clusters of CAR molecules are already mitigated by leading chipmakers in their cutting-edge nodes.
Furthermore, while increasing post-exposure bake (PEB) temperature from 95°C to 105°C disrupts the cohesive interactions and helps to get rid of some defects with certain manufacturing technologies, this is an absolute yield killer for modern fabrication processes that rely on EUV lithography.
Good for DUV, catastrophic for EUV
In Deep Ultraviolet (DUV, 193nm immersion) lithography, a PEB at around 105°C is well within the normal operating range for CARs based on poly(methacrylate). These resists form features roughly 20 nm – 40 nm wide, and their photoacid diffusion lengths (about 10 nm – 20 nm) remain small enough relative to those features to preserve resolution. At 105°C, the additional thermal energy slightly increases polymer mobility and acid diffusion, enabling more complete chemical reaction and smoother dissolution during development, which helps reduce residues and improve pattern uniformity, thus reducing defects and maintaining yields. However, in some cases a a PEB at around 105°C increases line-edge roughness (LER) and line-width roughness (LWR), which leads to degradation of critical dimension uniformity (CDU), which means that it should not be used for critical layers.
However, in EUV (13.5 nm) lithography, the situation is completely different. EUV resists are typically baked at 80°C–95°C to carefully balance acid mobility and reaction completion, maintaining critical-dimension control. EUV CARs must define features as small as 13nm, so even a few nanometers of acid spread can destroy pattern fidelity. Raising the PEB temperature to 105°C would greatly accelerate acid diffusion, broaden the reaction zone, and significantly increase LER/LWR, thereby blurring the fine features defined by the EUV exposure and potentially creating defects. It also increases stochastic variation by over-reacting CAR polymer chains unevenly, which leads to other defects.
The lowdown
While the study offers valuable microscopic insight into how photoresist polymers behave in developer films, its practical impact on semiconductor manufacturing is limited, to put things mildly. Increasing the PEB to 105°C is already within the normal safe range for DUV lithography and therefore not a breakthrough, which is why we do not see 30nm–40nm defects with modern DUV-based nodes. Meanwhile, the same temperature adjustment is unsuitable for EUV processes, as such temperatures can severely degrade resolution and yield.
As a result, the work is scientifically impressive, as it confirms mechanisms that chipmakers have long managed empirically. However, it offers no new solutions applicable to advanced nodes. Then again, if scientists from Intel, Samsung, or TSMC use cryo-ET as well, they might come up with something that leads to an actual breakthrough.
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Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.